DEMO MANUAL DC2077A
LTC6431-20
50Ω 20dB Gain Block
IF Amplifier
DESCRIPTION
Demonstration circuit 2077A features the
LTC
®
6431-20
50Ω gain block IF amplifier. The LTC6431-20 has a power
gain of 20.8dB and it is part of the LTC6431-YY amplifier
series.
The DC2077A demo board supports the LTC6431-YY am-
plifier family. The DC2077A demo board is optimized for
a frequency range from 100MHz to 1200MHz. It incorpo-
rates a minimum of passive components to configure the
amplifier for various applications. The LTC6431-20 pro-
vides 50Ω single-ended input and output impedances so
that it can be easily evaluated with most RF test equipment.
Design files for this circuit board are available at
http://www.linear.com/demo
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
BLOCK DIAGRAM
V
CC
9, 22
BIAS AND
TEMPERATURE
COMPENSATION
24
IN
20dB
GAIN
GND
8, 17, 23,
25 (EXPOSED PAD)
OUT
T_DIODE
18
16
643122 BD
Figure 1. LTC6431-20 Device Block Diagram
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DEMO MANUAL DC2077A
PERFORMANCE SUMMARY
Table 1. Typical Demo Board Performance Summary
SYMBOL
Power Supply
V
CC
I
CC
Operating Supply Range
Current Consumption
OUTPUT
THIRD-ORDER
INTERCEPT
POINT
1
OIP3
47.2
48.0
47.9
47.9
46.9
45.0
42.5
39.7
38.6
37.1
36.0
35.1
34.4
dBm
OUTPUT
THIRD-ORDER
INTERMODU-
LATION
1
OIM3
–90.4
–91.9
–91.9
–91.9
–89.9
–86.0
–81.0
–75.5
–73.1
–70.3
–68.0
–66.2
–64.8
dBc
All V
CC
Pins Plus OUT
Total Current
4.75V to 5.25V
95mA
PARAMETER
CONDITIONS
VALUE / UNIT
T
A
= 25°C, V
CC
= 5V
FREQUENCY POWER GAIN
(MHZ)
|S21|
100
200
240
300
400
500
600
700
800
900
1000
1100
1200
Units
20.2
20.6
20.6
20.7
20.6
20.6
20.6
20.5
20.5
20.5
20.4
20.3
20.2
dB
SECOND
HARMONIC
DISTORTION
2
HD2
–56.8
–55.6
–52.5
–50.5
–50.4
–47.8
–43.7
–42.1
–40.6
–37.1
–36.9
–35.7
–34.4
dBc
THIRD HARMONIC
DISTORTION
2
HD3
–96.7
–92.9
–106.1
–83.1
–77.4
–72.6
–64.0
–60.7
–63.1
–60.4
–55.1
–54.5
–53.6
dBc
OUTPUT 1DB
COMPRESSION
POINT
P1DB
23.2
22.4
22.0
21.8
21.7
21.8
21.7
21.4
21.4
21.1
20.8
20.4
20.3
dBm
NOISE FIGURE
3
NF
3.2
2.7
2.7
2.8
2.8
2.9
3.1
3.3
3.4
3.7
3.8
3.9
4.1
dB
Notes: All figures are referenced to J1 (Input Port) and J2 (Output Port).
1. Two-tone test conditions: Output power level = +2dBm/tone, tone spacing = 1MHz.
2. Single-tone test conditions: Output power level = +6dBm.
3. Small-signal noise figure.
OPERATION
The demo circuit 2077A is a high linearity, fixed gain
amplifier. It is designed for ease of use. Both the input
and output are internally matched to 50Ω single-ended
source and load impedance. Figure 2 shows the DC2077A’s
S-parameters.
Figure 4 shows the demo circuit’s schematic. The input and
output DC blocking capacitors (C1 and C7) are required
because this device is internally DC biased for optimal
operation. The frequency appropriate choke (L1) and the
decoupling capacitors (C3 and C4) provide the proper
DC bias to the RF output node. Only a single 5V supply is
necessary for the VCC pins on the device.
L2 and C6 are optional parts. These additional components
allow for further optimization to lower or wider frequency
range applications.
A parallel 62pF (C2) and 348Ω (R1) input network has
been added to ensure low frequency stability. Note that the
input stability network does degrade performance below
150MHz. Low frequency performance can be improved
by increasing the value of capacitor C2.
The T_DIODE Pin (Turret E1) can be forward biased to
ground with 1mA of current. The measured voltage will
be an indicator of the chip junction temperature (T
J
).
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DEMO MANUAL DC2077A
OPERATION
Please note that a number of DNC pins are connected on
the demo board. These connections are not necessary for
normal operation. Failure to float these pins may impair
the operation of the device. Table 2 shows the function of
each input and output on the board.
|S21| (dB)
NOMINAL WORKING
FREQUENCY RANGE
24
22
20
18
16
14
12
10
8
6
4
0
400
1200
1600
800
FREQUENCY (MHz)
|S12|
|S22|
|S21|
4
0
–4
|S11|, |S12|, |S22| (dB)
–8
–12
|S11|
–16
–20
–24
–28
–32
–36
2000
Table 2. DC2077A Board I/O Descriptons
CONNECTOR
J1 (IN)
J2 (OUT)
E1 (T_DIODE)
E2 (VCC)
E3 (GND)
FUNCTION
Single-ended input. Impedance matched to 50Ω. Drive
from a 50Ω network analyzer or signal source.
Single-ended output. Impedance matched to 50Ω.
Drives a 50Ω network analyzer or spectrum analyzer.
The measured voltage will be an indicator of the chip
junction temperature.
Positive supply voltage source.
Supply ground.
Figure 2. Demo Board S-Parameters
Additional Information
As with any RF device, minimizing ground inductance is
critical. Care should be taken during the board layout when
using these exposed pad packages. The maximum number
of small-diameter vias should be placed underneath the
exposed pad. This will ensure a good RF ground and low
thermal impedance. Maximizing the copper ground plane
will also improve heat spreading and lower the inductance
to ground. It is a good idea to cover the via holes with
solder mask on the back side of the PCB to prevent solder
from wicking away from the critical PCB to exposed pad
interface.
The DC2077A is a wide bandwidth demo board, but it is not
intended for operation down to DC. The lower frequency
cutoff is limited by on-chip matching elements.
Table 3 shows the LTC643X-YY amplifier series and its
associated demo boards. Each demo board lists the typical
working frequency range and the input and output imped-
ance of the amplifiers.
Setup Signal Sources and Spectrum Analyzer
The LTC6431-20 is an amplifier with high linearity perfor-
mance. Therefore, the output intermodulation products are
very low. Even using high dynamic range test equipment,
third-order intercept (IP3) measurements can drive test
setups to their limits. Consequently, accurate measure-
ment of IP3 for a low distortion IC such as the LTC6431-20
requires certain precautions to be observed in the test
setup as well as the testing procedure.
Table 3. The LTC643X-YY Amplifier Family and Corresponding Application Demo Boards
DEMO BOARD NUMBER
DC1774A-A
DC1774A-B
DC1774A-C
DC2032A
DC2077A
DC2153A
FREQUENCY RANGE
(MHz)
50 to 350
400 to 1000
100 to 1200
50 to 1000
100 to 1200
700 to 1700
NOTES/APPLICATIONS
Low Frequency
Mid Frequency
Wide Frequency
Cable Infrastructure
Wide Frequency
High Frequency
BOARD’S IN/OUT
IMPEDANCE
50Ω
50Ω
50Ω
75Ω
50Ω
50Ω
AMPLIFIER
LTC6430-15
LTC6430-15
LTC6431-15
LTC6430-15
LTC6431-20
LTC6430-15
AMPLIFIER’S
IMPEDANCE
Differential 100Ω
Differential 100Ω
Single-Ended 50Ω
Differential 100Ω
Single-Ended 50Ω
Differential 100Ω
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DEMO MANUAL DC2077A
OPERATION
Setup Signal Sources
Figure 4 shows a proposed IP3 test setup. This setup has
low phase noise, good reverse isolation, high dynamic
range, sufficient harmonic filtering and wideband imped-
ance matching. The setup is outlined below:
a. High performance signal generators 1 and 2 ( HP8644A)
are used. These suggested generators have low har-
monic distortion and very low phase noise.
b. High linearity amplifiers are used to improve the reverse
isolation. This prevents crosstalk between the two signal
generators and provides higher output power.
c. A lowpass filter is used to suppress the harmonic content
from interfering with the test signal. Note that second
order inputs can “mix” with the fundamental frequency
to form intermodulation (IM) products of their own. We
suggest filtering the harmonics to -50dBc or better.
d. The signal combiner from Mini-Circuits (ADP-2-9)
combines the two isolated input signals. This combiner
has a typical isolation of 27dB. For improved VSWR and
isolation, the H-9 signal combiner from MA/COM is an
alternative which features >40dB isolation and a wider
frequency range. Passive devices (e.g. combiners) with
magnetic elements can contribute nonlinearity to the
signal chain and should be used cautiously.
e. The attenuator pads on all three ports of the signal
combiner will further support isolation of the two input
signal sources. They also reduce reflections and promote
maximum power transfer with wideband impedance
matching.
Setup the Spectrum Analyzer
a. Adjust the spectrum analyzer for maximum possible
resolution of the intermodulation products’ amplitude
in dBc. A narrower resolution bandwidth will take a
longer time to sweep.
b. Optimize the dynamic range of the spectrum analyzer
by adjusting the input attenuation. First increase the
spectrum analyzer’s input attenuation (normally in
steps of 5dB or 10dB). If the IM product levels decrease
when the input attenuation is increased, then the input
power level is too high for the spectrum analyzer to
make a valid measurement. Most likely, the spectrum
analyzer’s 1st mixer was overloaded and producing its
own IM products. If the IM reading holds constant with
increased input attenuation, then a sufficient amount
of attenuation was present. Adding too much attenua-
tion will bury the intended IM signal in the noise floor.
Therefore, select just enough attenuation to achieve a
stable and valid measurement.
c. In order to achieve this valid measurement result, the
test system must have lower total distortion than the
DUT’s intermodulation. For example, to measure a
48dBm OIP3, the measured intermodulation products
will be –92dBc below the –18dBm per tone input level
and the test system must have intermodulation products
approximately –98dBc or better. For best results, the
IM products and noise floor should measure at least
–102dBc before connecting the DUT.
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DEMO MANUAL DC2077A
QUICK START PROCEDURE
Demo circuit 2077A can be set up to evaluate the perfor-
mance of the LTC6431-20. Refer to Figure 3 for proper
equipment connections and follow the procedure below:
Two-Tone Measurement
Connect all test equipment as suggested in Figure 3.
1. The power labels of VCC 4.75V-5.25V and GND directly
correspond to the power supply. Typical current con-
sumption of the LTC6431-20 is about 95mA.
2. Apply two independent signals f1 and f2 from signal
generator 1 and signal generator 2 at 240MHz and
241MHz, while setting the amplitude to –18dBm/tone
at the demo board input (J1).
3. Monitor the output tone level on the spectrum analyzer.
Adjust the signal generator levels such that the output
power measures +2dBm/tone at the amplifier output J2,
after correcting for external cable losses and attenuations.
4. Change the spectrum analyzer’s center frequency and
observe the two IM3 tones at 1 MHz below and above
the input frequencies. The frequencies of IM3_LOW and
IM3_HIGH are 239 MHz and 242 MHz, respectively. The
measurement levels should be approximately –92dBc;
+48dBm is typical OIP3 performance for the LTC6431-20
at 240MHz.
The OIP3 calculation is:
OIP3 = POUT + ∆IMD3/2
where:
POUT is the lower output signal power of the funda-
mental products.
∆IMD3 = POUT – PIM3; PIM3 is the higher third-order
intermodulation product.
Single-Tone Measurement
5. Continue with Step 4 above, turn off one signal source
to measure gain and harmonic distortions.
SIGNAL
HP8644A
GENERATOR 1
AMPLIFIER
Mini-Circuits
ZHL-2 OR EQUIVALENT
LOWPASS FILTER
6dB ATTN PAD
(OPTIONAL)
3dB ATTENUATION
PAD
COMBINER
Mini-Circuits
ADP-2-9
20dB ATTENUATION
PAD
SPECTRUM
ANALYZER
COAXIAL
CABLE
Rohde & Schwarz
FSEM30
6dB ATTN PAD
(OPTIONAL)
LOWPASS FILTER
AMPLIFIER
Mini-Circuits
ZHL-2 OR EQUIVALENT
SIGNAL
HP8644A
GENERATOR 2
VCC = 4.75V TO 5.25V
DC POWER SUPPLY
GND
V
+
Figure 3. Proper Equipement Setup for IP3 Measurement
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