a
SMD/883B
Scope
Complete 12-Bit 10 MSPS
Monolithic A/D Converter
AD872A
This specification covers the detail requirements for a complete monolithic 12-bit, 10 MSPS A/D con-
verter with an on-chip, high performance track-and-hold amplifier (THA) and voltage reference. The
electrical specifications match the Standard Microcircuit Drawing (SMD) 5962-93060 in effect at the
release of this data sheet. For a copy of the latest official SMD, contact DESC-ELDS.
Part Number/Case Outline
For case outline dimensions, see Package Information Appendix of General Specification ADI-M-1000.
The complete part numbers of these SMD and 883 devices are as follows:
Device
Type
SMD
Part Number
ADI 883B
Part Number
Package
Description
Package Designation
ADI MIL-STD-1835
01
02
5962-9306001MXA
5962-9306002MYA
AD872ASD/883B 28-Pin Side Brazed DIP
AD872ASE/883B 44-Terminal LCC
D-28 CDIP2-T28
E-44A CQCCI-N44
Absolute Maximum Ratings
(T
A
= +25°C unless otherwise noted)
1
AV
DD
to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−0.5
V to +6.5 V
AV
SS
to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−6.5
V to +0.5 V
DV
DD
, DRV
DD2
to DGND, DRGND
2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−0.5
V to +6.5 V
DRV
DD
to DV
DD2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−6.5
V to +6.5 V
DRGND to DGND
2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−0.3
V to +0.3 V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−1
V to +1 V
AV
DD
to DV
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−6.5
V to +6.5 V
Clock Input, OEN
2
to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−0.5
V to DV
DD
+ 0.5
V
Digital Outputs to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−0.5
V to DV
DD
+ 0.3
V
REF IN to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AV
SS
to AV
DD
V
INA
, to V
INB
, REF IN to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−6.5
V to +6.5 V
Storage Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−65°C
to +150°C
Lead Temperature (Soldering 10 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +300°C
Recommended Operating Conditions
2
Operating Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
Thermal Characteristics
Thermal Resistance, Junction-to-Case
(θ
JC
) for D-28 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28°C/W
Thermal Resistance, Junction-to-Ambient
(θ
J A
) for D-28 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C / W
Thermal Resistance, Junction-to-Case
(θ
JC
) for E-44A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20°C/W
Thermal Resistance, Junction-to-Ambient
(θ
J A
) for E-44A . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C / W
NOTES
1
Permanent damage may occur if any absolute maximum rating is exceeded. Functional operation is not implied and device
reliability may be impaired by exposure to higher-than-recommended voltages for extended periods of time.
2
Device Type 02 only.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for
its use, nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implica-
tion or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1997
AD872A–SPECIFICATIONS
Table 1. Electrical Performance Characteristics
Conditions
AV
DD
= +5 V, AV
SS
= –5 V,
DV
DD
= +5 V, DRV
DD
= +5 V Group A
unless otherwise specified
Subgroups
1, 2, 3
All Codes Histogram
1, 2, 3
1
1
External 2.5 V Reference
Internal 2.5 V Reference
External 2.5 V Reference
See Note 2
2, 3
2, 3
2, 3
1, 2, 3
1, 2, 3
T
A
= +25°C
T
A
= +25°C
1, 2, 3
1, 2, 3
1, 2, 3
Test
Resolution
Differential Nonlinearity
1
Zero Error
Gain Error
Zero Error Drift
Gain Error Drift
Gain Error Drift
Power Supply Rejection
Analog Input Range
Input Resistance
Input Capacitance
Internal Reference Output Voltage
Power Dissipation
Power Supply Current
Symbol
RES
DNL
B
POE
A
E
TCB
POE
TCA
INT
TCA
EXT
PSR
V
IN
R
IN
C
IN
V
REF
PD
IAV
DD
IAV
SS
IDV
DD
IDRV
DD
Signal-to-Noise and Distortion Ratio
S/(N + D)
f
IN
= 1 MHz; f
S
= 10 MHz
1, 2, 3
02
01
02
01
02
01, 02
01, 02
01
01
2.0
0.8
115
115
61
60
–62
–60
Device
Type
01, 02
01, 02
01, 02
01, 02
01, 02
01, 02
01, 02
01, 02
01, 02
01, 02
01, 02
01, 02
01, 02
01, 02
50 typ
10 typ
2.46
2.54
1.3
92
150
21
2
dB
Limits
Min
Max
12
12
0.75
1.25
0.30
1.75
0.5
0.125
1
Units
Bits
Bits
±
% FSR
±
% FSR
±
% FSR
±
% FSR
±
% FSR
±
% FSR
±
V
kΩ
pF
V
W
mA
Total Harmonic Distortion
THD
f
IN
= 1 MHz; f
S
= 10 MHz
1, 2, 3
dB
Logic Input High Voltage
Logic Input Low Voltage
Logic Input High Current (CLK)
Logic Input Low Current (CLK)
Logic Input High Current
(OEN, CLK)
Logic Input Low Current
(OEN, CLK)
Logic Output High Voltage
(MSB—Bit 12, OTR)
Logic Output Low Voltage
(MSB—Bit 12, OTR)
Leakage
Clock Period
Output Delay
V
IH
V
IL
I
IH
I
IL
I
IH
I
IL
V
OH
V
OL
I
Z
t
C
t
OD
I
SOURCE
= 500
µA
I
SINK
= 1.6 mA
Three State
See Figure 1.
See Figure 1.
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
V
V
±µA
±µA
±µA
±µA
V
1, 2, 3
02
115
1, 2, 3
02
115
1, 2, 3
01, 02
2.4
1, 2, 3
1, 2, 3
9, 10, 11
9, 10, 11
01, 02
02
01, 02
01, 02
100
10
0.4
10
V
±µA
ns
ns
NOTES
1
Minimum resolution for which “No Missing Codes” is guaranteed.
2
Test conditions for PSR: 4.75 V
≤
AV
DD
≤
5.25 V, –5.25 V
≤
AV
SS
≤
–4.75 V, 4.75 V
≤
DV
DD
≤
5.25 V.
–2–
REV. B