VCC1 series
1.8, 2.5, 3.3, 5.0 volt CMOS Oscillator
Features
•
CMOS output
•
Output frequencies to 190 MHz
•
Low jitter, Fundamental or 3
rd
OT Crystal
•
Tri-state output for board test and debug
•
-10/70 or –40/85
°C
operating temperature
•
Gold over nickel contact pads
•
Hermetically sealed ceramic SMD package
The VCC1 Crystal Oscillator
•
Product is compliant to RoHS directive
and fully compatible with lead free assembly
Applications
•
SONET/SDH/DWDM
•
Ethernet, Gigabit Ethernet
•
Storage Area Network
•
Digital Video
•
Broadband Access
•
Microprocessors/DSP/FPGA
Description
Vectron’s VCC1 Crystal Oscillator (XO) is quartz
stabilized square wave generator with a CMOS
output, operating off a 1.8, 2.5, 3.3, or 5.0 volt
supply.
The VCC1 uses fundamental or 3
rd
overtone
crystals resulting in low jitter performance,
typically 0.5ps rms in the 12 kHz to 20MHz
band. Also a monolithic IC, which improves
reliability and reduces cost, is hermitically
sealed.
f
o
Output
Buffer /
Disable
Vectron International 267 Lowell Road, Hudson NH 03051
Tel: 1-88-VECTRON-1
e-mail: vectron@vectron.com
Performance Characteristics
Table 1. Electrical Performance, 5V option
Parameter
Symbol
Frequency
f
O
1
Operating Supply Voltage
V
DD
Absolute Maximum Supply Voltage
Supply Current, Output Enabled
I
DD
<1.5 MHz
1.5 to 20 MHz
20.01 to 50 MHz
50.01 to 85 MHz
85.01 to 125 MHz
Supply Current, Out disabled
I
DD
Output Logic Levels
Output Logic High
2
V
OH
2
Output Logic Low
V
OL
Output Logic High Drive
I
OH
Output Logic Low Drive
I
OL
2
Output Rise/Fall Time
t
R/
t
F
< 1.00 MHz
1.0 to 20.00 MHz
20.01 to 50.00 MHz
50.01 to 125.00 MHz
Duty Cycle
3
(ordering option)
SYM
Operating Temperature (ordering
option)
Storage Temperature
Stability
4
(ordering
option)
RMS Jitter, 12kHz to 20 MHz
Period Jitter, RMS
Output Enable/Disable
5
Output Enabled
Output Disabled
Internal Enable Pull-Up resistor
5
Start-up time
Min
0.012
4.5
-0.7
Typical
5.0
Maximum
125.000
5.5
7.0
7
10
30
50
60
30
0.9*V
DD
0.1*V
DD
16
16
200
8
5
2
45/55
-10/70 or -40/85
-55
125
±20, ±25, ±32, ±50, ±100
0.5
1
2.5
4.0
0.8
100
10
Kohm
ms
%
°C
°C
ppm
ps
ps
V
Units
MHz
V
V
mA
uA
V
V
mA
mA
ns
1. A 0.01uF and a 0.1uF capacitor should be located as close to the supply as possible (to ground) is recommended.
2. Figure 1 defines these parameters. Figure 2 illustrates the operating conditions under which these parameters are tested and
specified.
3. Symmetry is measured defined as On Time/Period.
4. Includes calibration tolerance, operating temperature, supply voltage variations, aging and shock and vibration (not under
operation).
5. Output will be enabled if enable/disable is left open.
t
R
t
F
I
DD
4
V
DD
V
OH
50%
V
OL
On Time
Period
+
-
.
1µF
.01µF
I
C
V
C
1
+
-
2
3
15pF
Figure 1. Output Waveform
Figure 2. Typical Output Test Conditions (25±5°C)
Vectron International 267 Lowell Rd, Hudson NH 03051
Tel: 1-88-VECTRON-1
e-mail: vectron@vectron.com
VCC1 Data sheet
Table 2. Electrical Performance, 3.3V option
Parameter
Symbol
Frequency
f
O
1
Operating Supply Voltage
V
DD
Absolute Maximum Operating Voltage
Supply Current, Output Enabled
I
DD
< 1.500 MHz
1.5 to 20 MHz
20.01 to 50 MHz
50.01 to 85 MHz
85.01 to 190 MHz
Supply Current, Output disabled
I
DD
Output Logic Levels
Output Logic High
2
V
OH
2
Output Logic Low
V
OL
Output Logic High Drive
I
OH
Output Logic Low Drive
I
OL
2
Output Rise/Fall Time
t
R/
t
F
< 1.00 MHz
1.00 to 20.00 MHz
20.01 to 50.00 MHz
50.01 to 90.00 MHz
90.01 to 190.00 MHz
Duty Cycle
3
(ordering option)
SYM
Operating Temperature (ordering
option)
Storage Temperature
Stability
4
(ordering
option)
RMS Jitter, 12kHz to 20 MHz
RMS Jitter
Output Enable/Disable
5
Output Enabled
Output Disabled
Internal Enable Pull-Up resistor
5
Start-up time
Min
0.012
2.97
-0.5
Typical
3.3
Maximum
190.000
3.63
5.0
5
7
20
30
50
30
Units
MHz
V
V
mA
uA
V
V
mA
mA
ns
0.9*V
DD
0.1*V
DD
8
8
200
6
4
3
2
45/55
-10/70 or –40/85
-55
125
±20, ±25, ±32, ±50, ±100
0.5
1
2.5
2.0
0.5
100
10
%
°C
°C
ppm
ps
ps
V
Kohm
ms
1. A 0.01uF and a 0.1uF capacitor should be located as close to the supply as possible (to ground) is recommended.
2. Figure 3 defines these parameters. Figure 4 illustrates the operating conditions under which these parameters are tested and
specified. For Fo>90MHz, rise and fall time is measured 20 to 80%.
3. Symmetry is measured defined as On Time/Period.
4. Includes calibration tolerance, operating temperature, supply voltage variations, aging and shock and vibration (not under
operation).
5. Output will be enabled if enable/disable is left open.
t
R
t
F
I
DD
4
V
DD
V
OH
50%
V
OL
On Time
Period
+
-
.
1
µ
F
.01
µ
F
I
C
V
C
1
2
3
15pF
+
-
Figure 3. Output Waveform
Figure 4. Typical Output Test Conditions (25±5°C)
Vectron International 267 Lowell Rd, Hudson NH 03051
Tel: 1-88-VECTRON-1
e-mail: vectron@vectron.com
VCC1 Data sheet
Table 3. Electrical Performance, 2.5V option
Parameter
Symbol
Frequency
f
O
1
Operating Supply Voltage
V
DD
Absolute Maximum Voltage
Supply Current, Output Enabled
I
DD
< 20 MHz
20.01 to 50 MHz
50.01 to 110 MHz
110.1 to 190 MHz
Supply Current, Out disabled
I
DD
Output Logic Levels
Output Logic High
2
V
OH
2
Output Logic Low
V
OL
Output Logic High Drive
I
OH
Output Logic Low Drive
I
OL
3
Output Logic High Drive
I
OH
3
Output Logic Low Drive
I
OL
2
Output Rise/Fall Time
t
R/
t
F
<1.00 MHz
1.00 to 20.00 MHz
20.01 to 50.00 MHz
50.01 to 90.00 MHz
90.01 to 190.00 MHz
Duty Cycle
4
(ordering option)
SYM
Operating Temperature (ordering
option)
Storage Temperature
Stability
5
(ordering
option)
RMS Jitter, 12kHz to 20 MHz
RMS Jitter
Output Enable/Disable
6
Output Enabled
Output Disabled
Internal Enable Pull-Up resistor
6
Start-up time
Min
0.012
2.25
-0.5
Typical
2.5
Maximum
190.000
2.75
5.0
7.0
15.0
20.0
30.0
30
Units
MHz
V
V
mA
uA
V
V
mA
mA
mA
mA
ns
0.9*V
DD
0.1*V
DD
4
4
8
8
200
10
6
3
2
45/55
-10/70 or –40/85
-55
125
±20, ±25, ±32, ±50, ±100
0.5
1
2.5
1.75
0.5
100
10
%
°C
°C
ppm
ps
ps
V
Kohm
ms
1. A 0.01uF and a 0.1uF capacitor should be located as close to the supply as possible (to ground) is recommended.
2. Figure 5 defines these parameters. Figure 6 illustrates the operating conditions under which these parameters are tested and
specified.
3. Overtone designs, output frequencies>35MHz.
4. Symmetry is measured defined as On Time/Period.
5. Includes calibration tolerance, operating temperature, supply voltage variations, aging and shock and vibration (not under
operation).
6. Output will be enabled if enable/disable is left open.
t
R
80
%
t
F
+
-
I
DD
4
V
DD
Vs
20
%
On Time
Period
.
1µF
.01µF
I
C
V
C
1
+
-
2
3
15pF
Figure 5. Output Waveform
Figure 6. Typical Output Test Conditions (25±5°C)
Vectron International 267 Lowell Rd, Hudson NH 03051
Tel: 1-88-VECTRON-1
e-mail: vectron@vectron.com
VCC1 Data sheet
Table 4. Electrical Performance, 1.8V option
Parameter
Symbol
Frequency
f
O
1
Operating Supply Voltage
V
DD
Absolute Maximum Voltage
Supply Current, Output Enabled
I
DD
< 20 MHz
20.01 to 70 MHz
70.01 to 96 MHz
96.01 to 125 MHz
125.01 to 172 MHz
Supply Current, Out disabled
I
DD
Output Logic Levels
Output Logic High
2
V
OH
2
Output Logic Low
V
OL
Output Logic High Drive
I
OH
Output Logic Low Drive
I
OL
3
Output Logic High Drive
I
OH
3
Output Logic Low Drive
I
OL
2
Output Rise/Fall Time
t
R/
t
F
< 1.00 MHz
1.000 to 20.00 MHz
20.01 to 50.00 MHz
50.01 to 90.00 MHz
90.01 to 172.00 MHz
Duty Cycle
4
(ordering
option)
SYM
Operating temperature (ordering
option)
Storage Temperature
Stability
5
(ordering
option)
RMS Jitter, 12kHz to 20 MHz
RMS Jitter
Output Enable/Disable
6
Output Enabled
Output Disabled
Internal Enable Pull-Up resistor
6
Start-up time
Min
0.048
1.71
-0.5
Typical
1.8
Maximum
172.000
1.89
3.6
5
15
20
25
30
30
Units
MHz
V
V
mA
uA
V
V
mA
mA
mA
mA
ns
0.9*V
DD
0.1*V
DD
2.8
2.8
8
8
200
4
4
3
2
45/55
-10/70 or –40/85
-55
125
±20, ±25, ±32, ±50, ±100
0.5
2.2
1.26
0.5
1
10
%
°C
°C
ppm
ps
ps
V
Mohm
ms
1. A 0.01uF and a 0.1uF capacitor should be located as close to the supply as possible (to ground) is recommended.
2. Figure 7 defines these parameters. Figure 8 illustrates the operating conditions under which parameters are tested/specified.
3. Overtone designs, output frequencies>35MHz.
4. Symmetry is measured defined as On Time/Period.
5. Includes calibration tolerance, operating temperature, supply voltage variations, aging and shock and vibration (not under
operation).
6. Output will be enabled if enable/disable is left open.
t
R
80
%
Vs
20
%
t
F
I
DD
4
V
DD
+
-
.
1µF
.01µF
I
C
1
+
-
2
3
15pF
On Time
Period
V
C
Figure 7. Output Waveform
Figure 8. Typical Output Test Conditions (25±5°C)
Vectron International 267 Lowell Rd, Hudson NH 03051
Tel: 1-88-VECTRON-1
e-mail: vectron@vectron.com
FPGA/CPLD
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