电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

PT7M6315US33D4

产品描述Supervisory Circuit
文件大小383KB,共6页
制造商Pericom Semiconductor Corporation (Diodes Incorporated)
官网地址https://www.diodes.com/
下载文档 全文预览

PT7M6315US33D4概述

Supervisory Circuit

文档预览

下载PDF文档
PT7M6315US
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Supervisory Circuit
Features
Highly accurate:
1.5%
(25°
C)
Detect voltage range: 1.8 to 5V in 100mV
increments
Operating voltage range: 1.0V ~ 5.5V
Operating temperature range: -40° to + 85°
C
C
Detect voltage temperature characteristics:
2.5% 
TYP
Output configuration: N-channel open drain
Three reset timeout period available:
typical 1.6ms for PT7M6315USxxD1;
typical 26ms for PT7M6315USxxD2;
typical 200ms for PT7M6315USxxD3;
typical 1570ms for PT7M6315USxxD4;
Description
The series are designed to monitor power supplies in µ
P
and digital systems. It provides excellent circuit
reliability and low cost by eliminating external
components and adjustments, and a debounced manual
reset input.
This device performs a single function: it asserts a reset
signal whenever the V
CC
supply voltage falls below a
preset threshold or whenever manual reset is asserted.
Reset remains asserted for an internally programmed
interval (reset timeout period) after V
CC
has risen above
the reset threshold or manual reset is deasserted.
The PT7M6315USxx are open-drain RESET output.
They can be pulled up to a voltage higher than V
CC
.
The serials come with factory-trimmed reset threshold
voltages in 100mV increments from 1.8V to 5V. Preset
timeout periods of 200ms (typ.) for PT7M6315USxxD3,
1570ms (typ.) for PT7M6315USxxD4, and 26ms for
PT7M6315USxxD2 are available.
Pin Configuration
PT7M6315USxxD3F/D4F
1
GND
VCC
4
2
RST
SOT143-4
MR
3
Pin Description
Name Type
RST
MR
I/O
I
P
P
Description
Reset Output:
RST is asserted when V
CC
drops below voltage threshold V
TH-
. Active low.
Manual Reset:
A logic low on MR asserts reset. Reset remains asserted as long as MR is low, and for the
reset timeout period (t
RS
) after the reset conditions are terminated. Connect to V
CC
if not used.
Ground
Supply Voltage.
GND
V
CC
2015-09-0002
1
PT0197-4
09/15/15
若要从事FPGA方面工作需哪些方面的知识技能?
我以后有点打算从事FPGA方面的工作,请问需要掌握哪些方面的技能呢?希望前辈,大侠们给予指点,谢谢!...
emnqsu FPGA/CPLD
带图晒板CC2650 STK
安卓上的APP只支持 4.4与安卓5,家里都是4.4以下跟6,4.4以下的安装不上,6加载不了界面。后来用苹果APP store搜TI sensortag,可顺利调试,一切顺利。 但仅作展示意义不大,本想调2650 ZIgb ......
FengG冯工 无线连接
80C196KC汇编语言问题,请教高手!
; Segment type: Internal processor memory & SFR ; segment INTMEM ZERO_REG: dw 0FFFFh ; DATA XREF: start+17Fr start+1A5r ... //Error gsp.asm(26,0): No seg ......
自语的骆驼 单片机
FPGA培训学习心得
FPGA培训学习心得 ...
zxopenljx FPGA/CPLD
金融危机下智能家居如何突围?
序:次贷危机引发的金融危机对全球经济产生了巨大影响,这种影响也正在从房地产领域和金融领域向更多的实体经济领域扩散,中国经济正在遭受改革开放以来最严峻的外围市场挑战,时间已经接近年中 ......
xyh_521 工业自动化与控制
DMA控制器
#include const unsigned char testconst = { 0x00, 0x03, 0x02, 0x03, 0x00, 0x01 }; void main(void) { WDTCTL = WDTPW + WDTHOLD; // Stop watchdog P1DIR | ......
黯影 微控制器 MCU

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 1864  1358  1833  1541  1614  57  54  38  58  43 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved