Datasheet> 器件分类 > 嵌入式处理器和控制器> 微控制器和处理器> CA91L860B-40CE

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CA91L860B-40CE: 产品描述PCI Bus Controller, CMOS, PBGA256, PLASTIC, BGA-256; 产品类别嵌入式处理器和控制器微控制器和处理器; 文件大小50KB，共15页; 制造商Tundra Semiconductor Corp

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CA91L860B-40CE概述

PCI Bus Controller, CMOS, PBGA256, PLASTIC, BGA-256

CA91L860B-40CE规格参数

参数名称	属性值
厂商名称	Tundra Semiconductor Corp
包装说明	PLASTIC, BGA-256
Reach Compliance Code	unknown
地址总线宽度	32
总线兼容性	MC68360; MPC860
最大时钟频率	40 MHz
驱动器接口标准	IEEE 1149.1
外部数据总线宽度	32
JESD-30 代码	S-PBGA-B256
长度	27 mm
端子数量	256
最高工作温度	70 °C
最低工作温度
封装主体材料	PLASTIC/EPOXY
封装代码	BGA
封装形状	SQUARE
封装形式	GRID ARRAY
认证状态	Not Qualified
座面最大高度	3.5 mm
最大供电电压	5.5 V
最小供电电压	4.5 V
标称供电电压	5 V
表面贴装	YES
技术	CMOS
温度等级	COMMERCIAL
端子形式	BALL
端子节距	1.27 mm
端子位置	BOTTOM
宽度	27 mm
uPs/uCs/外围集成电路类型	BUS CONTROLLER, PCI

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QSpan (CA91L860B) & QSpan II (CA91L862A)

Differences Summary

www.tundra.com

Hardware

Table 1: New Pin Descriptions in QSpan IIZ1

DP[3:0]

Bidirectional

Data Parity: provides the parity information for the data on D[31:0]. It is valid on the same clock as the data.

ENUM#

Open Drain Output

Hot Swap Event Interrupt: notifies the PCI host that either a board has been inserted or is about to be extracted.

EXT_GNT#[6:1]

Output

External Grant: used by the QSpan II to indicate to an external device that it has been granted access to the PCI bus

EXT_REQ#[6:1]

Bidirectional

External Request: used by an external device to indicate to the QSpan II PCI bus arbiter that it wants ownership of the PCI bus. The QSpan II drives the unused

EXT_REQ#[6:1] pins high when an external arbiter is used.

HS_HEALTHY

Input

Hot Swap Healthy: QSpan II internally OR’s this input with PCI reset (RST#) to determine when back-end power is stable.

HS_LED

Output

Hot Swap LED Control: This signal is driven by QSpan II to control the status of the LED. The signal is driven low to turn on the LED during the hardware

and software connection stages. The signal is tri-stated during normal operation to turn off the LED.

HS_SWITCH

Input

Hot Swap Switch: QSpan II uses this input to monitor the state of the Hot Swap board ejector latch. A low value on this signal indicates that the ejector latch is

open.

PCI_ARB_EN

Input

PCI Arbiter Enable: If PCI_ARB_EN is sampled high at the negation of Reset, the QSpan II’s PCI bus arbiter is enabled and will function as the PCI bus

arbiter.

PCI_DIS

Input

PCI Configuration Disable: This is a power-up option that makes the QSpan II hold off on ENUM# assertion and retry PCI configuration cycles to allow the

Host processor to perform local configuration. QSpan II accepts PCI configuration cycles after the PCI_DIS bit is cleared in the MISC_CTL2 register.

PME#

Open Drain Output

Power Management Event Interrupt: This signal is asserted to request a change in its current power management state and/or to indicate that a power

management event has occurred.

TEST1

Input

This is a manufacturing test input that should be left open. This pin has an internal pull-up resistor.

TEST2

Input

This is a manufacturing test input that should be left open. This pin has an internal pull-down resistor.

TEST3

Input

This is a manufacturing test input that should be left open. This pin has an internal pull-down resistor.

QSpan (CA91L860B) & QSpan II (CA91L862A) Differences Summary

8091862.AN002.06

CA91L860B-40CE相似产品对比

	CA91L860B-40CE	CA91C860B-40CQ	CA91L860B-40IE	CA91C860B-40IQ	CA91C860B-50CQ	CA91L860B-50CE
描述	PCI Bus Controller, CMOS, PBGA256, PLASTIC, BGA-256	PCI Bus Controller, CMOS, PQFP208, PLASTIC, QFP-208	PCI Bus Controller, CMOS, PBGA256, PLASTIC, BGA-256	PCI Bus Controller, CMOS, PQFP208, PLASTIC, QFP-208	PCI Bus Controller, CMOS, PQFP208, PLASTIC, QFP-208	PCI Bus Controller, CMOS, PBGA256, PLASTIC, BGA-256
包装说明	PLASTIC, BGA-256	PLASTIC, QFP-208	PLASTIC, BGA-256	PLASTIC, QFP-208	PLASTIC, QFP-208	PLASTIC, BGA-256
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknow
地址总线宽度	32	32	32	32	32	32
总线兼容性	MC68360; MPC860	MC68360; MPC860	MC68360; MPC860	MC68360; MPC860	MC68360; MPC860	MC68360; MPC860
最大时钟频率	40 MHz	40 MHz	40 MHz	40 MHz	50 MHz	50 MHz
驱动器接口标准	IEEE 1149.1	IEEE 1149.1	IEEE 1149.1	IEEE 1149.1	IEEE 1149.1	IEEE 1149.1
外部数据总线宽度	32	32	32	32	32	32
JESD-30 代码	S-PBGA-B256	S-PQFP-G208	S-PBGA-B256	S-PQFP-G208	S-PQFP-G208	S-PBGA-B256
长度	27 mm	28 mm	27 mm	28 mm	28 mm	27 mm
端子数量	256	208	256	208	208	256
最高工作温度	70 °C	70 °C	85 °C	85 °C	70 °C	70 °C
封装主体材料	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	BGA	FQFP	BGA	FQFP	FQFP	BGA
封装形状	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
封装形式	GRID ARRAY	FLATPACK, FINE PITCH	GRID ARRAY	FLATPACK, FINE PITCH	FLATPACK, FINE PITCH	GRID ARRAY
认证状态	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
座面最大高度	3.5 mm	4.1 mm	3.5 mm	4.1 mm	4.1 mm	3.5 mm
最大供电电压	5.5 V	3.46 V	5.5 V	3.46 V	3.46 V	5.5 V
最小供电电压	4.5 V	3.14 V	4.5 V	3.14 V	3.14 V	4.5 V
标称供电电压	5 V	3.3 V	5 V	3.3 V	3.3 V	5 V
表面贴装	YES	YES	YES	YES	YES	YES
技术	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
温度等级	COMMERCIAL	COMMERCIAL	INDUSTRIAL	INDUSTRIAL	COMMERCIAL	COMMERCIAL
端子形式	BALL	GULL WING	BALL	GULL WING	GULL WING	BALL
端子节距	1.27 mm	0.5 mm	1.27 mm	0.5 mm	0.5 mm	1.27 mm
端子位置	BOTTOM	QUAD	BOTTOM	QUAD	QUAD	BOTTOM
宽度	27 mm	28 mm	27 mm	28 mm	28 mm	27 mm
uPs/uCs/外围集成电路类型	BUS CONTROLLER, PCI	BUS CONTROLLER, PCI	BUS CONTROLLER, PCI	BUS CONTROLLER, PCI	BUS CONTROLLER, PCI	BUS CONTROLLER, PCI
厂商名称	Tundra Semiconductor Corp	-	Tundra Semiconductor Corp	Tundra Semiconductor Corp	Tundra Semiconductor Corp	Tundra Semiconductor Corp

CA91L860B-40CE

CA91L860B-40CE概述

CA91L860B-40CE规格参数

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CA91L860B-40CE相似产品对比

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