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Datasheet> 器件分类 > 半导体> 嵌入式处理器和控制器> TS80C51RA2-MCJB

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TS80C51RA2-MCJB: 产品描述8-BIT, 40 MHz, MICROCONTROLLER, PQFP44; 产品类别半导体嵌入式处理器和控制器; 文件大小320KB，共74页; 制造商Atmel (Microchip)

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TS80C51RA2-MCJB概述

8-BIT, 40 MHz, MICROCONTROLLER, PQFP44

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TS80C51RA2/RD2

TS83C51RB2/RC2/RD2

TS87C51RB2/RC2/RD2

High Performance 8-bit Microcontrollers

1. Description

Atmel Wireless & Microcontrollers TS80C51Rx2 is high

performance CMOS ROM, OTP, EPROM and ROMless

versions of the 80C51 CMOS single chip 8-bit

microcontroller.

The TS80C51Rx2 retains all features of the 80C51 with

extended ROM/EPROM capacity (16/32/64 Kbytes), 256

bytes of internal RAM, a 7-source , 4-level interrupt

system, an on-chip oscilator and three timer/counters.

In addition, the TS80C51Rx2 has a Programmable

Counter Array, an XRAM of 256 or 768 bytes, a

Hardware Watchdog Timer, a more versatile serial

channel that facilitates multiprocessor communication

(EUART) and a X2 speed improvement mechanism.

The fully static design of the TS80C51Rx2 allows to

reduce system power consumption by bringing the clock

frequency down to any value, even DC, without loss of

data.

The TS80C51Rx2 has 2 software-selectable modes of

reduced activity for further reduction in power

consumption. In the idle mode the CPU is frozen while

the timers, the serial port and the interrupt system are still

operating. In the power-down mode the RAM is saved

and all other functions are inoperative.

2. Features

•

80C52 Compatible

•

8051 pin and instruction compatible

•

Four 8-bit I/O ports

•

Three 16-bit timer/counters

•

256 bytes scratchpad RAM

•

High-Speed Architecture

•

40 MHz @ 5V, 30MHz @ 3V

•

X2 Speed Improvement capability (6 clocks/

machine cycle)

30 MHz @ 5V, 20 MHz @ 3V (Equivalent to

60 MHz @ 5V, 40 MHz @ 3V)

•

Dual Data Pointer

•

Hardware Watchdog Timer (One-time enabled with

Reset-Out)

•

2 extra 8-bit I/O ports available on RD2 with high

pin count packages

•

Asynchronous port reset

•

Interrupt Structure with

•

7 Interrupt sources,

•

4 level priority interrupt system

•

Full duplex Enhanced UART

•

Framing error detection

•

Automatic address recognition

•

Low EMI (inhibit ALE)

•

On-chip ROM/EPROM (16K-bytes, 32K-bytes, 64K-

bytes)

•

Power Control modes

•

Idle mode

•

Power-down mode

•

Power-off Flag

•

Once mode (On-chip Emulation)

•

On-chip eXpanded RAM (XRAM) (256 or 768 bytes)

•

Programmable Clock Out and Up/Down Timer/

Counter 2

•

Programmable Counter Array with

•

High Speed Output,

Compare / Capture,

Pulse Width Modulator,

Watchdog Timer Capabilities

•

Power supply: 4.5-5V, 2.7-5.5V

•

Temperature ranges: Commercial (0 to 70

C) and

Industrial (-40 to 85

•

Packages: PDIL40, PLCC44, VQFP44 1.4, CQPJ44

(window), CDIL40 (window), PLCC68, VQFP64

1.4, JLCC68 (window)

Rev. C - 06 March, 2001

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