NCP1593A, NCP1593B
1 MHz, 3 A Synchronous
Buck Regulator
The NCP1593 is a fixed 1 MHz, high−output−current, synchronous
PWM converter that integrates a low−resistance, high−side P−channel
MOSFET and a low−side N−channel MOSFET. The NCP1593 utilizes
internally compensated current mode control to provide good transient
response, ease of implementation and excellent loop stability. It
regulates input voltages from 4.0 V to 5.5 V down to an output voltage
as low as 0.6 V and is able to supply up to 3 A of load current.
The NCP1593 includes an internally fixed switching frequency
(F
SW
), and an internal soft−start to limit inrush current. Other features
include cycle−by−cycle current limiting, 100% duty cycle operation,
short− circuit protection, power saving mode and thermal shutdown.
Features
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MARKING
DIAGRAMS
1593A
ALYWG
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
1593B
ALYWG
G
DFN10
CASE 485C
A
L
Y
W
G
•
Wide Input Voltage Range: from 4.0 V to 5.5 V
•
Internal 90 mW High−Side P−Channel MOSFET and 60 mW
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Low−Side N−Channel MOSFET
Fixed 1 MHz Switching Frequency
Cycle−by−Cycle Current Limiting
Hiccup Mode Short−Circuit Protection
Overtemperature Protection
Internal Soft−Start
Start−up with Pre−Biased Output Load
Adjustable Output Voltage Down to 0.6 V
Diode Emulation During Light Load
100% Duty Cycle Operation to Extend the Battery Life
These are Pb−Free Devices
Set−Top Boxes
DVD Drives and HDD
LCD Monitors and TVs
Cable Modems
USB Modems
Telecom/Networking/Datacom Equipment
(Note: Microdot may be in either location)
PIN CONNECTIONS
NC 1
LX 2
LX 3
PG 4
EN 5
NCP1593A
(Top View)
LX 1
LX 2
LX 3
PG 4
EN 5
NCP1593B
(Top View)
GND
10 VCCP
9 VCCP
8 VCCA
7 NC
6 FB
GND
10 VCCP
9 VCCP
8 VCCA
7 SS
6 FB
Applications
ORDERING INFORMATION
Device
NCP1593AMNTWG
NCP1593BMNTWG
Package
DFN10
(Pb−Free)
DFN10
(Pb−Free)
Shipping
†
3000 / Tape &
Reel
3000 / Tape &
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2012
July, 2012
−
Rev. 2
1
Publication Order Number:
NCP1593/D
NCP1593A, NCP1593B
BLOCK DIAGRAM
NCP1593A
VCCP
VCC
Power Reset
UVLO
THD
Hiccup
+
CA
−
EN
Ri
+
OSC
SS
Soft−Start
PMOS
M1
LX
+
+ gm
−
Rc1
−
PWM
+
Control
Logic
LX
Vref
FB
PG
Power
Good
Cc1
0.9 x Vref
Cc2
PGND
Figure 1. Block Diagram
PIN DESCRIPTIONS
Pin No
1
2, 3
4
5
6
7
8
9, 10
EP
Symbol
NC / LX
LX
PG
EN
FB
SS / NC
V
CC
V
CCP
GND
Description
No connect pin for NCP1593A. The user may ground this pin or leave it floating. / LX pin for NCP1593B
The drains of the internal MOSFETs. The output inductor should be connected to these pins.
Open drain output from the Power Good logic. When the FB voltage is within regulation, this is a high
impedance pin. Otherwise it is pulled low.
Logic input to enable the part. Logic high to turn on the part and a logic low to shut off the part. An intern-
al pullup forces the part into an enable state when no external bias is present on the pin.
Feedback input pin of the Error Amplifier. Connect a resistor divider from the converter’s output voltage
to this pin to set the converter’s regulated voltage.
An external capacitor on this pin sets the soft−start ramp time. Leaving this pin open sets the soft−start
time at 500
ms.
For NCP1593B this pin is a no connect and should be left floating.
Input supply pin for internal bias circuitry. Connect a 0.1
mF
ceramic bypass capacitor to this pin. Directly
connect the V
CC
pin to the V
CCP
pin on the board.
Input for the power stage
Exposed pad of the package provides both electrical contact to the ground and good thermal contact to
the PCB. This pad must be soldered to the PCB for proper operation.
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2
NCP1593A, NCP1593B
APPLICATION CIRCUIT
4.0 V
−
5.5 V
V
in
2.2
mH
9,10
8
VCCP
NCP1593
VCCA
EN
PG
SS
LX
LX
FB
NC
2
3
6
1
V
out
R1
22
mF
22
mF
22
mF
5
4
7
R2
PGND EP
Figure 2. Recommended Application Circuit
ABSOLUTE MAXIMUM RATINGS
Rating
Power Supply Pin (Pins 8, 9, 10) to GND
Symbol
V
in
Value
6.5
−0.3
(DC)
−1.0
(t < 100 ns)
V
in
+ 0.7
V
in
+ 1.0 (t < 20 ns)
−0.7
(DC)
−5.0
(t < 100 ns)
6.0
−0.3
(DC)
−1.0
(t < 100 ns)
T
A
T
J
T
J(MAX)
T
S
R
qJA
−40
to +85
−40
to +125
+150
−55
to +150
68
Unit
V
LX to GND
V
All other pins
V
Operating Ambient Temperature Range (Note 1)
Operating Junction Temperature Range (Note 1)
Maximum Junction Temperature
Storage Temperature Range
Thermal Resistance Junction−to−Air (Note 2)
°C
°C
°C
°C
°C/W
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. The maximum package power dissipation limit must not be exceeded.
P
D
+
T
J(max)
*
T
A
R
qJA
2. R
qJA
measured on approximately 1x1 inch sq. of 1 oz. Copper FR−4 or G−10 board.
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3
NCP1593A, NCP1593B
ELECTRICAL CHARACTERISTICS
(−40°C < T
J
< 125°C, V
CC
= 4.0 V
−
5.5 V, for min/max values unless noted otherwise)
Parameter
Input Voltage Range
V
CC
UVLO Threshold
UVLO Hysteresis
V
CC
Quiescent Current
VCCP Quiescent Current
Shutdown Supply Current
FEEDBACK VOLTAGE
Reference Voltage
Reference Voltage
Feedback Input Bias Current
Feedback Voltage Line Regulation (Note 3)
PWM
Maximum Duty Cycle (Regulating)
Maximum Duty Cycle (LDO mode)
Minimum Controllable On Time
Current Limit
Cycle-by-cycle Current Limit (Note 3)
Oscillator
Switching Frequency
MOSFET’s
High-Side MOSFET On Resistance
High-Side MOSFET Leakage
Low-Side MOSFET On Resistance
Low-Side MOSFET Leakage
POWER GOOD
Power Good Rising Threshold
Power Good Falling Threshold
Power Good Hysteresis (High-to-Low)
Power Good Pulldown Voltage
ENABLE
Enable High Threshold
Enable Low Threshold
Enable Hysteresis
Enable Pullup Current
Soft-Start
Default Soft-start Ramp Time
Maximum Soft-start Ramp time
Hiccup Timer
Soft-start Current
Thermal Shutdown
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
3. Guaranteed by Characterization.
185
30
°C
°C
I
SS
0.51
t
SS
t
SS
SS = open; f
SW
= 1MHz
SS = max cap; f
SW
= 1MHz
0.5
0.58
10
4 * t
SS
0.7
0.87
0.65
ms
ms
ms
mA
V
ENHI
V
ENLO
V
ENhys
I
EN
200
1.4
3.0
1.4
0.4
V
V
mV
mA
V
PGH
V
PHL
V
PGhys
V
RPG
I
PG
= 2.5 mA
0.51
0.48
0.54
0.51
30
130
250
V
V
mV
mV
R
DSonH
I
lkgH
R
DSonL
I
lkgL
I
DS
= 100 mA, V
IN
= 5.0 V
LX = 0 V
I
DS
= 100 mA, V
IN
= 5.0 V
LX = 5 V
60
90
190
10
90
10
mW
mA
mW
mA
f
SW
0.87
1.0
1.13
MHz
I
LIM
V
CC
= 5.0 V, T
J
= 25°C
5.1
A
d.c.
MAX
d.c.
LDO
t
ONmin
Vout > d.c.
MAX
* V
IN
35
95
100
%
%
ns
V
FB
V
FB
I
FB
V
CC
= 4.0 V to 5.5 V
T
J
= 25°C
0.591
0.594
0.6
0.6
10
0.609
0.606
100
−65
V
V
nA
dB
Symbol
V
IN
V
UVLO
V
UVLO_hys
I
INVCC
I
INVCCP
I
QSHDN
Test Conditions
Min
4.0
2.4
2.5
320
1.0
20
1.8
1.5
50
3.0
Typ
Max
5.5
2.9
Unit
V
V
mV
mA
mA
mA
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NCP1593A, NCP1593B
TYPICAL CHARACTERISTICS
100
95
V
IN
= 4.5 V
EFFICIENCY (%)
90
85
80
75
70
V
IN
= 5.0 V
EFFICIENCY (%)
90
85
80
75
70
100
95
V
IN
= 4.0 V
V
IN
= 5.0 V
0.01
0.1
1
10
0.01
0.1
1
10
I
OUT
, OUTPUT CURRENT (A)
I
OUT
, OUTPUT CURRENT (A)
Figure 3. Efficiency vs. Output Current (3.3 V)
100
V
OUT
, OUTPUT VOLTAGE (V)
95
EFFICIENCY (%)
90
85
80
75
70
65
0.01
0.1
1
10
V
IN
= 5.0 V
V
IN
= 4.0 V
3.40
3.38
3.36
3.34
3.32
3.30
3.28
3.26
3.24
3.22
3.20
Figure 4. Efficiency vs. Output Current (1.8 V)
V
IN
= 5.0 V
V
IN
= 4.5 V
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8 2.0
I
OUT
, OUTPUT CURRENT (A)
I
OUT
, OUTPUT CURRENT (A)
Figure 5. Efficiency vs. Output Current (1.05 V)
1.90
V
OUT
, OUTPUT VOLTAGE (V)
V
OUT
, OUTPUT VOLTAGE (V)
1.88
1.86
1.84
1.82
1.80
1.78
1.76
1.74
1.72
1.70
V
IN
= 5.0 V
V
IN
= 4.5 V
1.15
1.13
1.11
1.09
1.07
1.05
1.03
1.01
0.99
0.97
0.95
Figure 6. Load Regulation (3.3 V)
V
IN
= 5.0 V
V
IN
= 4.5 V
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8 2.0
I
OUT
, OUTPUT CURRENT (A)
I
OUT
, OUTPUT CURRENT (A)
Figure 7. Load Regulation (1.8 V)
Figure 8. Load Regulation (1.05 V)
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