IDT74LVCH16601A
3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER
EXTENDED COMMERCIAL TEMPERATURE RANGE
3.3V CMOS 18-BIT
IDT74LVCH16601A
UNIVERSAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS,
5 VOLT TOLERANT I/O, BUS-HOLD
FEATURES:
Typical
t
SK(0)
(Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
– 0.635mm pitch SSOP, 0.50mm pitch TSSOP
and 0.40mm pitch TVSOP packages
– Extended commercial range of -40°C to +85°C
– V
CC
= 3.3V ±0.3V, Normal Range
– V
CC
= 2.7V to 3.6V, Extended Range
– CMOS power levels (0.4µ W typ. static)
– All inputs, outputs and I/O are 5 Volt tolerant
– Supports hot insertion
Drive Features for LVCH16601A:
– High Output Drivers: ±24mA
– Reduced system switching noise
–
–
Data flow in each direction is controlled by output-enable (OEAB and
OEBA),
latched-enable (LEAB and LEBA), and clock (CLKAB and CLKBA)
inputs. The clock can be controlled by the clock-enable (CLKENAB and
CLKENBA)
inputs.
For A-to-B data flow, the device operates in the transparent mode when
LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at
a high or low logic level. If LEAB is low, the A-bus data is stored in the latch/
flip-flop on the low-to-high transition of CLKAB. Output enable
OEAB
is active
low. When
OEAB
is low, the outputs are active. When
OEAB
is high, the
outputs are in the high-impedance state. Data flow for B to A is similar to that
of A to B but uses
OEBA,
LEBA, CLKBA and
CLKENBA.
All pins can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V supply system.
The LVCH16601A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
The LVCH16601A has “bus-hold” which retains the inputs’ last state
whenever the input goes to a high impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.
APPLICATIONS:
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
DESCRIPTION
The LVCH16601A 18-bit universal bus transceiver is built using ad-
vanced dual metal CMOS technology. The LVCH16601A combines D-
type latches and D-type flip-flops to allow data flow in transparent, latched
and clocked modes.
Functional Block Diagram
OEAB
1
56
CLKAB
55
LEAB
LEBA
2
28
30
29
27
CLKENBA
3
54
B
1
EXTENDED COMMERCIAL TEMPERATURE RANGE
1
c
1999 Integrated Device Technology, Inc.
MARCH 1999
DSC-4074/1
IDT74LVCH16601A
3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER
EXTENDED COMMERCIAL TEMPERATURE RANGE
PIN CONFIGURATION
OEAB
LEAB
A
1
GN D
A
2
A
3
V
CC
A
4
A
5
A
6
GN D
A
7
A
8
A
9
A
10
A
11
A
12
GN D
A
13
A
14
A
15
V
CC
A
16
A
17
GN D
A
18
OEBA
LEBA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
SO56-1
SO56-2 43
SO56-3
42
41
40
39
38
37
36
35
34
33
32
31
30
29
CLKENAB
CLKAB
B
1
GN D
B
2
B
3
V
CC
B
4
B
5
B
6
GN D
B
7
B
8
B
9
B
10
B
11
B
12
GN D
B
13
B
14
ABSOLUTE MAXIMUM RATINGS
Symbol
V
TERM(2)
V
TERM(3)
T
STG
I
OUT
I
IK
I
OK
I
CC
I
SS
Description
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Continuous Clamp Current,
V
I
< 0 or V
O
< 0
Continuous Current through
each V
CC
or GND
(1)
Unit
V
V
°C
mA
mA
mA
LVC Link
Max.
– 0.5 to +6.5
– 0.5 to +6.5
– 65 to +150
– 50 to +50
– 50
±100
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2. V
CC
terminals.
3. All terminals except V
CC
.
CAPACITANCE
(T
A
= +25
O
C, f = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output
Capacitance
I/O Port
Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
V
IN
= 0V
Typ.
4.5
6.5
6.5
Max.
6
8
8
Unit
pF
pF
pF
LVC Link
B
15
V
CC
B
16
B
17
GN D
B
18
CLKBA
CLKENBA
C
I/O
NOTE:
1. As applicable to the device type.
FUNCTION TABLE
(1, 2)
CLKENAB
X
X
X
H
L
L
L
L
OEAB
H
L
L
L
L
L
L
L
Inputs
LEAB
X
H
H
L
L
L
L
L
CLKAB
X
X
X
X
↑
↑
L
H
Ax
X
L
H
X
L
H
X
X
Outputs
Bx
Z
L
H
B
0(3)
L
H
B
0(3)
B
0(4)
SSOP/ TSSOP/ TVSOP
TOP VIEW
PIN DESCRIPTION
Pin Names
OEAB
OEBA
LEAB
LEBA
CLKAB
CLKBA
Ax
Bx
CLKENAB
CLKENBA
Description
A-to-B Output Enable Input (Active LOW)
B-to-A Output Enable Input (Active LOW)
A-to-B Latch Enable Input
B-to-A Latch Enable Input
A-to-B Clock Input
B-to-A Clock Input
A-to-B Data Inputs or B-to-A 3-State Outputs
(1)
B-to-A Data Inputs or A-to-B 3-State Outputs
(1)
A-to-B Clock Enable Input (Active LOW)
B-to-A Clock Enable Input (Active LOW)
NOTE:
1. These pins have “Bus-hold”. All other pins are standard inputs,
outputs, or I/Os.
c
1998 Integrated Device Technology, Inc.
NOTES:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High-Impedance
↑
= LOW-to-HIGH Transition
2. A-to-B data flow is shown. B-to-A data flow is similar but uses
OEBA,
LEBA, CLKBA and
CLKENBA.
3. Output level before the indicated steady-state input conditions were
established.
4. Output level before the indicated steady-state input conditions were
established, provided that CLKAB was HIGH before LEAB went LOW.
2
DSC-123456
IDT74LVCH16601A
3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER
EXTENDED COMMERCIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: T
A
= –40
O
C to +85
O
C
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
I
OFF
V
IK
V
H
I
CCL
I
CCH
I
CCZ
∆I
CC
Parameter
Input HIGH Voltage Level
Input LOW Voltage Level
Input Leakage Current
High Impedance Output Current
(3-State Output pins)
Input/Output Power Off Leakage
Clamp Diode Voltage
Input Hysteresis
Quiescent Power Supply Current
V
CC
= 0V, V
IN
or V
O
≤
5.5V
V
CC
= 2.3V, I
IN
= – 18mA
V
CC
= 3.3V
V
CC
= 3.6V
V
IN
= GND or V
CC
3.6
≤
V
IN
≤
5.5V
(2)
Quiescent Power Supply
Current Variation
One input at V
CC
- 0.6V
other inputs at V
CC
or GND
—
—
—
—
—
—
—
– 0.7
100
—
—
—
±50
– 1.2
—
10
10
500
µA
LVC Link
Test Conditions
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 3.6V
V
CC
= 3.6V
V
I
= 0 to 5.5V
V
O
= 0 to 5.5V
Min.
1.7
2
—
—
—
—
Typ.
(1)
—
—
—
—
—
—
Max.
—
—
0.7
0.8
±5
±10
Unit
V
V
µA
µA
µA
V
mV
µA
NOTES:
1. Typical values are at V
CC
= 3.3V, +25°C ambient.
2. This applies in the disabled state only.
BUS-HOLD CHARACTERISTICS
Symbol
I
BHH
I
BHL
I
BHH
I
BHL
I
BHHO
I
BHLO
LVC Link
Parameter
(1)
Bus-Hold Input Sustain Current
Bus-Hold Input Sustain Current
Bus-Hold Input Overdrive Current
V
CC
= 3.0V
V
CC
= 2.3V
V
CC
= 3.6V
Test Conditions
V
I
= 2.0V
V
I
= 0.8V
V
I
= 1.7V
V
I
= 0.7V
V
I
= 0 to 3.6V
Min.
– 75
75
—
—
—
Typ.
(2)
—
—
—
—
—
Max.
—
—
—
—
± 500
Unit
µA
µA
µA
NOTES:
1. Pins with Bus-hold are identified in the pin description.
2. Typical values are at V
CC
= 3.3V, +25°C ambient.
3
IDT74LVCH16601A
3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER
EXTENDED COMMERCIAL TEMPERATURE RANGE
OUTPUT DRIVE CHARACTERISTICS
Symbol
V
OH
Parameter
Output HIGH Voltage
V
CC
Test Conditions
(1)
= 2.3V to 3.6V
I
OH
= – 0.1mA
I
OH
= – 6mA
I
OH
= – 12mA
Min.
V
CC
– 0.2
2
1.7
2.2
2.4
I
OH
= – 24mA
I
OL
= 0.1mA
I
OL
= 6mA
I
OL
= 12mA
V
CC
= 2.7V
V
CC
= 3.0V
I
OL
= 12mA
I
OL
= 24mA
2.2
—
—
—
—
—
Max.
—
—
—
—
—
—
0.2
0.4
0.7
0.4
0.55
LVC Link
Unit
V
V
CC
= 2.3V
V
CC
= 2.3V
V
CC
= 2.7V
V
CC
= 3.0V
V
CC
= 3.0V
V
OL
Output LOW Voltage
V
CC
= 2.3V to 3.6V
V
CC
= 2.3V
V
NOTE:
1. V
IH
and V
IL
must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the
appropriate V
CC
range. T
A
= – 40°C to +85°C.
OPERATING CHARACTERISTICS, VCC = 3.3V
±
0.3V, TA = 25°C
Symbol
C
PD
C
PD
Parameter
Power Dissipation Capacitance per transceiver Outputs enabled
Power Dissipation Capacitance per transceiver Outputs disabled
Test Conditions
C
L
= 0pF, f = 10Mhz
Typical
Unit
pF
pF
4
IDT74LVCH16601A
3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER
EXTENDED COMMERCIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SU
t
H
t
SU
Parameter
Propagation Delay
Ax to Bx or Bx to Ax
Propagation Delay
LEBA to Ax, LEAB to Bx
Propagation Delay
CLKBA to Ax, CLKAB to Bx
Output Enable Time
OEBA
to Ax,
OEAB
to Bx
Output Disable Time
OEBA
to Ax,
OEAB
to Bx
Set-up Time, HIGH or LOW
Ax to CLKAB, Bx to CLKBA
Hold Time HIGH or LOW
Ax after CLKAB, Bx after CLKBA
Set-up Time
Clock
HIGH or LOW
LOW
Ax to LEAB,
Clock
Bx to LEBA
HIGH
Set-up Time,
CLKENAB
to CLKAB
Set-up Time,
CLKENBA
to CLKBA
Hold Time, HIGH or LOW
Ax after LEAB, Bx after LEBA
Hold Time,
CLKENAB
after CLKAB
Hold Time,
CLKENBA
after CLKBA
LEAB or LEBA Pulse Width
HIGH
CLKAB or CLKBA Pulse Width
HIGH or LOW
Output Skew
(2)
Min.
(1)
V
CC
= 2.7V
Max.
5.4
6.2
6.3
6.8
6
Min.
V
CC
= 3.3V±0.3V
Max.
4.6
5.2
5.3
5.6
5.2
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ps
—
—
—
—
—
1.5
0.8
1
1
2.1
2.1
1.8
0.5
0.5
3
3
—
—
—
—
—
1.5
0.8
1
1
2.1
2.1
1.8
0.5
0.5
3
3
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
500
t
SU
t
SU
t
H
t
H
t
H
t
W
t
W
t
SK
(o)
—
—
NOTES:
1. See test circuits and waveforms. T
A
= – 40°C to + 85°C.
2. Skew between any two outputs of the same package and switching in the same direction.
5
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