79LV0408
Low Voltage 4 Megabit
(512k x 8-bit) EEPROM
CE
1
RS
E
R
/B
WE
OE
A
0-16
128K x 8
128K x 8
128K x 8
128K x 8
CE
2
CE
3
CE
4
I/O
0-7
Logic Diagram
Memory
F
EATURES
:
• Four 128k x 8-bit EEPROMs MCM
• R
AD
-P
AK
® radiation-hardened against natural
space radiation
• Total dose hardness:
- > 100 krad (Si), depending upon space mission
• Excellent Single Event Effects
- SEL > 120 MeV/mg/cm
2
- SEU > 90 MeV/mg/cm
2
read mode
- SEU = 18 MeV/mg/cm
2
write mode
• Package:
• - 40 pin R
AD
-P
AK
® flat pack
• - 40 pin X-Ray Pak
TM
flat pack
• - 40 pin Rad-Tolerant flat pack
• High speed:
-200 and 250 ns access times
available
• Data Polling and Ready/Busy signal
• Software data protection
• Write protection by RES pin
• High endurance
- 10,000 erase/write (in Page Mode),
- 10 year data retention
• Page write mode: 1 to 128 byte page
• Low power dissipation
- 88 mW/MHz active mode
- 440 µ W standby mode
D
ESCRIPTION
:
Maxwell Technologies’ 79LV0408 multi-chip module (MCM)
memory features a greater than 100 krad (Si) total dose toler-
ance, depending upon space mission. Using Maxwell Technol-
ogies’ patented radiation-hardened R
AD
-P
AK
® MCM
packaging technology, the 79LV0408 is the first radiation-
hardened 4 Megabit MCM EEPROM for space applications.
The 79LV0408 uses four 1 Megabit high-speed CMOS die to
yield a 4 Megabit product. The 79LV0408 is capable of in-sys-
tem electrical Byte and Page programmability. It has a 128
bytes Page Programming function to make its erase and write
operations faster. It also features Data Polling and a Ready/
Busy signal to indicate the completion of erase and program-
ming operations. In the 79LV0408, hardware data protection is
provided with the RES pin, in addition to noise protection on
the WE signal. Software data protection is implemented using
the JEDEC optional standard algorithm.
Maxwell Technologies' patented R
AD
-P
AK
® packaging technol-
ogy incorporates radiation shielding in the microcircuit pack-
age. It eliminates the need for box shielding while providing
the required radiation shielding for a lifetime in orbit or space
mission. In a GEO orbit, the R
AD
-P
AK
® package provides
greater than 100 krad (Si) radiation dose tolerance. This prod-
uct is available with screening up to Maxwell Technologies
self-defined Class K.
01.11.05 Rev 7
All data sheets are subject to change without notice
1
(858) 503-3300 - Fax: (858) 503-3301- www.maxwell.com
©2005 Maxwell Technologies
All rights reserved.
Low Voltage 4 Megabit (512k x 8-bit) EEPROM MCM
79LV0408
D
ESCRIPTION
T
ABLE
1. 79LV0408 P
IN
D
ESCRIPTION
P
IN
16-9, 32-31,
28, 30, 8, 33,
7, 36, 6
17-19, 22-26
29
2, 3, 39, 38
34
1, 27, 40
4, 20, 21, 37
5
35
S
YMBOL
A0 to A16
Address Input
I/O0 to I/O7
OE
CE1-4
WE
VCC
VSS
RDY/BUSY
RES
Data Input/Output
Output Enable
Chip Enable 1 through 4
Write Enable
Power Supply
Ground
Ready/Busy
Reset
Memory
T
ABLE
2. 79LV0408 A
BSOLUTE
M
AXIMUM
R
ATINGS
P
ARAMETER
Supply Voltage
Input Voltage
Package Weight
Thermal Resistance ( RP Package)
Operating Temperature Range
Storage Temperature Range
S
YMBOL
V
CC
V
IN
RP
RT
Tjc
T
OPR
T
STG
-55
-65
M
IN
-0.6
-0.5
1
M
AX
7.0
7.0
23
10
7.3
125
150
°
C/W
°
C
°
C
U
NIT
V
V
Grams
1. V
IN
MIN
= -3.0V
FOR PULSE WIDTH
<50
NS
.
T
ABLE
3. 79LV0408 R
ECOMMENDED
O
PERATING
C
ONDITIONS
P
ARAMETER
Supply Voltage
Input Voltage
RES_PIN
Case Operating Temperature
1. V
IL
min = -1.0V for pulse width < 50 ns
S
YMBOL
V
CC
V
IL
V
IH
V
H
T
C
M
IN
3.0
-0.3
1
2.2
V
CC
-0.5
-55
M
AX
3.6
0.8
V
CC
+0.3
V
CC
+1
125
U
NIT
V
V
V
V
°
C
01.11.05 Rev 7
All data sheets are subject to change without notice
2
©2005 Maxwell Technologies
All rights reserved.
Low Voltage 4 Megabit (512k x 8-bit) EEPROM MCM
79LV0408
T
ABLE
4. 79LV0408 C
APACITANCE1
(T
A
= 25
°
C, f = 1 MHz)
P
ARAMETER
Input Capacitance: V
IN
= 0 V
1
WE
CE
1-4
OE
A
0-16
Output Capacitance: V
OUT
= 0 V
1
1. Guaranteed by design.
S
YMBOL
C
IN
--
--
--
--
C
OUT
24
6
24
24
48
pF
M
IN
M
AX
U
NIT
pf
T
ABLE
5. D
ELTA
P
ARAMETERS
P
ARAMETER
I
CC1
I
CC2
I
CC3
I
CC4
C
ONDITION
+ 10% of value in Table 6
+ 10% of value in Table 6
+ 10% of value in Table 6
+ 10% of value in Table 6
Memory
T
ABLE
6. 79LV0408 DC E
LECTRICAL
C
HARACTERISTICS
(V
CC
= 3.3V ±10%, T
A
= -55
TO
+125°C)
P
ARAMETER
Input Leakage Current
T
EST
C
ONDITION
V
CC
= 5.5V, V
IN
= 5.5V
1
CE
1-4
OE, WE
A
0-16
Output Leakage Current V
CC
= 5.5V, V
OUT
= 5.5V/0.4V
Standby V
CC
Current
Operating V
CC
Current
2
CE = V
CC
CE = V
IH
I
OUT
= 0mA, Duty = 100%,
Cycle = 1µ s at V
CC
= 5.5V
I
OUT
= 0mA, Duty = 100%,
Cycle = 150ns at V
CC
= 5.5V
Input Voltage
RES_PIN
Output Voltage
I
OL
= 2.1 mA
I
OH
= -0.4 mA
I
LO
I
CC1
I
CC2
I
CC3
I
CC4
V
IL
V
IH
V
H
V
OL
V
OH
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
S
YMBOL
I
IL
S
UBGROUPS
1, 2, 3
--
--
--
--
--
--
--
--
--
2.2
V
CC
-0.5
--
2.4
2
1
8
8
8
80
4
15
50
0.8
--
--
0.4
--
V
V
µA
µA
mA
mA
M
IN
M
AX
U
NITS
µA
01.11.05 Rev 7
All data sheets are subject to change without notice
3
©2005 Maxwell Technologies
All rights reserved.
Low Voltage 4 Megabit (512k x 8-bit) EEPROM MCM
79LV0408
1. I
LI
on RES = 100 uA max.
2. Only on CE\ Active.
T
ABLE
7. 79LV0408 AC E
LECTRICAL
C
HARACTERISTICS FOR
R
EAD
O
PERATIONS1
(V
CC
= 3.3V ±10%, T
A
= -55
TO
+125°C)
P
ARAMETER
Address Access Time CE = OE = V
IL
, WE = V
IH
-200
-250
Chip Enable Access Time OE = V
IL
, WE = V
IH
-200
-250
Output Enable Access Time CE = V
IL
, WE = V
IH
-200
-250
Output Hold to Address Change CE = OE = V
IL
, WE = V
IH
-200
-250
Output Disable to High-Z
2
CE = V
IL
, WE = V
IH
-200
-250
CE = OE = V
IL
, WE = V
IH
-200
-250
RES to Output Delay CE = OE = V
IL
, WE = V
IH 3
-200
-250
S
YMBOL
t
ACC
S
UBGROUPS
9, 10, 11
--
--
t
CE
9, 10, 11
0
0
t
OE
9, 10, 11
0
0
t
OH
9, 10, 11
0
0-
t
DF
9, 10, 11
0
0
t
DFR
9, 10, 11
0
0
t
RR
9, 10, 11
--
--
520
550
300
350
ns
60
60
--
--
ns
110
120
200
250
ns
200
250
ns
M
IN
M
AX
U
NIT
ns
Memory
ns
1. Test conditions: Input pulse levels - 0.4V to 2.4V; input rise and fall times < 20ns; output load - 1 TTL gate + 100pF (including
scope and jig); reference levels for measuring timing - 0.8V/1.8V.
2.
t
DF
and t
DFR
are defined as the time at which the output becomes an open circuit and data is no longer driven.
3. Guaranteed by design.
T
ABLE
8. 79LV0408 AC E
LECTRICAL
C
HARACTERISTICS FOR
W
RITE
O
PERATIONS
(V
CC
= 3.3V ±10%, T
A
= -55
TO
+125°C)
P
ARAMETER
Address Setup Time
-200
-250
S
YMBOL
t
AS
S
UBGROUPS
9, 10, 11
0
0
--
--
M
IN1
M
AX
U
NIT
ns
01.11.05 Rev 7
All data sheets are subject to change without notice
4
©2005 Maxwell Technologies
All rights reserved.
Low Voltage 4 Megabit (512k x 8-bit) EEPROM MCM
79LV0408
M
IN1
0
0
9, 10, 11
M
AX
--
--
ns
200
250
200
250
9, 10, 11
125
150
--
--
ns
100
100
--
--
ns
10
10
--
--
ns
0
0
--
--
ns
0
0
--
--
ns
0
0
--
--
ns
0
0
--
--
ns
0
0
--
--
ms
--
--
15
15
ns
700
750
--
--
µs
100
100
--
--
--
--
--
--
ns
U
NIT
ns
T
ABLE
8. 79LV0408 AC E
LECTRICAL
C
HARACTERISTICS FOR
W
RITE
O
PERATIONS
(V
CC
= 3.3V ±10%, T
A
= -55
TO
+125°C)
P
ARAMETER
Chip Enable to Write Setup Time (WE Controlled)
-200
-250
Write Pulse WidthCE Controlled
-200
-250
WE Controlled
-200
-250
Address Hold Time
-200
-250
Data Setup Time
-200
-250
Data Hold Time
-200
-250
Chip Enable Hold Time (WE Controlled)
-200
-250
Write Enable to Write Setup Time (CE Controlled)
-200
-250
Write Enable Hold Time (CE Controlled)
-200
-250
Output Enable to Write Setup Time
-200
-250
Output Enable Hold Time
-200
-250
Write Cycle Time
2
-200
-250
Data Latch Time
-200
-250
Byte Load Window
-200
-250
S
YMBOL
t
CS
S
UBGROUPS
9, 10, 11
t
CW
t
WP
t
AH
t
DS
9, 10, 11
Memory
t
DH
9, 10, 11
t
CH
9, 10, 11
t
WS
9, 10, 11
t
WH
9, 10, 11
t
OES
9, 10, 11
t
OEH
9, 10, 11
t
WC
9, 10, 11
t
DL
9, 10, 11
t
BL
9, 10, 11
01.11.05 Rev 7
All data sheets are subject to change without notice
5
©2005 Maxwell Technologies
All rights reserved.
NXP MCU
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