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IS61LPS102418A-250TQLI

产品描述Cache SRAM, 1MX18, 2.6ns, CMOS, PQFP100, LEAD FREE, TQFP-100
产品类别存储    存储   
文件大小370KB,共35页
制造商Integrated Silicon Solution ( ISSI )
标准  
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IS61LPS102418A-250TQLI概述

Cache SRAM, 1MX18, 2.6ns, CMOS, PQFP100, LEAD FREE, TQFP-100

IS61LPS102418A-250TQLI规格参数

参数名称属性值
是否无铅不含铅
是否Rohs认证符合
厂商名称Integrated Silicon Solution ( ISSI )
零件包装代码QFP
包装说明LQFP, QFP100,.63X.87
针数100
Reach Compliance Codecompliant
ECCN代码3A991.B.2.A
最长访问时间2.6 ns
其他特性PIPELINED ARCHITECTURE
最大时钟频率 (fCLK)250 MHz
I/O 类型COMMON
JESD-30 代码R-PQFP-G100
JESD-609代码e3
长度20 mm
内存密度18874368 bit
内存集成电路类型CACHE SRAM
内存宽度18
湿度敏感等级3
功能数量1
端子数量100
字数1048576 words
字数代码1000000
工作模式SYNCHRONOUS
最高工作温度85 °C
最低工作温度-40 °C
组织1MX18
输出特性3-STATE
封装主体材料PLASTIC/EPOXY
封装代码LQFP
封装等效代码QFP100,.63X.87
封装形状RECTANGULAR
封装形式FLATPACK, LOW PROFILE
并行/串行PARALLEL
峰值回流温度(摄氏度)260
电源2.5/3.3,3.3 V
认证状态Not Qualified
座面最大高度1.6 mm
最大待机电流0.125 A
最小待机电流3.14 V
最大压摆率0.5 mA
最大供电电压 (Vsup)3.465 V
最小供电电压 (Vsup)3.135 V
标称供电电压 (Vsup)3.3 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子面层Matte Tin (Sn) - annealed
端子形式GULL WING
端子节距0.65 mm
端子位置QUAD
处于峰值回流温度下的最长时间40
宽度14 mm
Base Number Matches1

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IS61VPS25672A IS61LPS25672A
IS61VPS51236A IS61LPS51236A
IS61VPS102418A IS61LPS102418A
256K x 72, 512K x 36, 1024K x 18
18Mb SYNCHRONOUS PIPELINED,
SINGLE CYCLE DESELECT STATIC RAM
FEATURES
• Internal self-timed write cycle
• Individual Byte Write Control and Global Write
• Clock controlled, registered address, data and
control
• Burst sequence control using MODE input
• Three chip enable option for simple depth
expansion and address pipelining
• Common data inputs and data outputs
• Auto Power-down during deselect
• Single cycle deselect
• Snooze MODE for reduced-power standby
• JTAG Boundary Scan for PBGA package
• Power Supply
LPS: V
DD
3.3V + 5%, V
DDQ
3.3V/2.5V + 5%
VPS: V
DD
2.5V + 5%, V
DDQ
2.5V + 5%
• JEDEC 100-Pin TQFP, 119-ball PBGA, 165-ball
PBGA, and 209-ball (x72) packages
• Lead-free available
MAY 2010
DESCRIPTION
The
ISSI
IS61LPS/VPS51236A, IS61LPS/VPS102418A,
and IS61LPS/VPS25672A are high-speed, low-power syn-
chronous static RAMs designed to provide burstable, high-
performance memory for communication and networking
applications. The IS61LPS/VPS51236A is organized as
524,288 words by 36 bits, the IS61LPS/VPS102418A is
organized as 1,048,576 words by 18 bits, and the IS61LPS/
VPS25672A is organized as 262,144 words by 72 bits.
Fabricated with
ISSI
's advanced CMOS technology, the
device integrates a 2-bit burst counter, high-speed SRAM
core, and high-drive capability outputs into a single mono-
lithic circuit. All synchronous inputs pass through regis-
ters controlled by a positive-edge-triggered single clock
input.
Write cycles are internally self-timed and are initiated by
the rising edge of the clock input. Write cycles can be one
to four bytes wide as controlled by the write control inputs.
Separate byte enables allow individual bytes to be written.
The byte write operation is performed by using the byte
write enable (BWE) input combined with one or more
individual byte write signals (BWx). In addition, Global
Write (GW) is available for writing all bytes at one time,
regardless of the byte write controls.
Bursts can be initiated with either
ADSP
(Address Status
Processor) or
ADSC
(Address Status Cache Controller)
input pins. Subsequent burst addresses can be generated
internally and controlled by the
ADV
(burst address
advance) input pin.
The mode pin is used to select the burst sequence order,
Linear burst is achieved when this pin is tied LOW.
Interleave burst is achieved when this pin is tied HIGH or
left floating.
FAST ACCESS TIME
Symbol
t
KQ
t
KC
Parameter
Clock Access Time
Cycle Time
Frequency
250
2.6
4
250
200
3.1
5
200
Units
ns
ns
MHz
Copyright © 2010 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. N
02/12/2010
1

IS61LPS102418A-250TQLI相似产品对比

IS61LPS102418A-250TQLI IS61VPS102418A-200TQ IS61LPS25672A-250B1L IS61VPS102418A-200TQI IS61LPS51236A-200B2LI IS61VPS102418A-250B2
描述 Cache SRAM, 1MX18, 2.6ns, CMOS, PQFP100, LEAD FREE, TQFP-100 1MX18 CACHE SRAM, 3.1ns, PQFP100, TQFP-100 Cache SRAM, 256KX72, 2.6ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, LEAD FREE, PLASTIC, BGA-209 1MX18 CACHE SRAM, 3.1ns, PQFP100, TQFP-100 Cache SRAM, 512KX36, 3.1ns, CMOS, PBGA119, 14 X 22 MM, 1 MM PITCH, LEAD FREE, PLASTIC, BGA-119 Cache SRAM, 1MX18, 2.6ns, CMOS, PBGA119, 14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-119
是否无铅 不含铅 含铅 不含铅 含铅 不含铅 含铅
是否Rohs认证 符合 不符合 符合 不符合 符合 不符合
厂商名称 Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI )
零件包装代码 QFP QFP BGA QFP BGA BGA
包装说明 LQFP, QFP100,.63X.87 TQFP-100 BGA, BGA209,11X19,40 TQFP-100 BGA, BGA119,7X17,50 BGA, BGA119,7X17,50
针数 100 100 209 100 119 119
Reach Compliance Code compliant compliant compliant compliant compliant compliant
ECCN代码 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A
最长访问时间 2.6 ns 3.1 ns 2.6 ns 3.1 ns 3.1 ns 2.6 ns
其他特性 PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE
最大时钟频率 (fCLK) 250 MHz 200 MHz 250 MHz 200 MHz 200 MHz 250 MHz
I/O 类型 COMMON COMMON COMMON COMMON COMMON COMMON
JESD-30 代码 R-PQFP-G100 R-PQFP-G100 R-PBGA-B209 R-PQFP-G100 R-PBGA-B119 R-PBGA-B119
JESD-609代码 e3 e0 e1 e0 e1 e0
长度 20 mm 20 mm 22 mm 20 mm 22 mm 22 mm
内存密度 18874368 bit 18874368 bit 18874368 bit 18874368 bit 18874368 bit 18874368 bit
内存集成电路类型 CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM
内存宽度 18 18 72 18 36 18
功能数量 1 1 1 1 1 1
端子数量 100 100 209 100 119 119
字数 1048576 words 1048576 words 262144 words 1048576 words 524288 words 1048576 words
字数代码 1000000 1000000 256000 1000000 512000 1000000
工作模式 SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
最高工作温度 85 °C 70 °C 70 °C 85 °C 85 °C 70 °C
组织 1MX18 1MX18 256KX72 1MX18 512KX36 1MX18
输出特性 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 LQFP LQFP BGA LQFP BGA BGA
封装等效代码 QFP100,.63X.87 QFP100,.63X.87 BGA209,11X19,40 QFP100,.63X.87 BGA119,7X17,50 BGA119,7X17,50
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE GRID ARRAY FLATPACK, LOW PROFILE GRID ARRAY GRID ARRAY
并行/串行 PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL
峰值回流温度(摄氏度) 260 NOT SPECIFIED 260 240 260 NOT SPECIFIED
电源 2.5/3.3,3.3 V 2.5 V 2.5/3.3,3.3 V 2.5 V 2.5/3.3,3.3 V 2.5 V
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
座面最大高度 1.6 mm 1.6 mm 1.95 mm 1.6 mm 3.5 mm 3.5 mm
最大待机电流 0.125 A 0.11 A 0.11 A 0.125 A 0.125 A 0.11 A
最小待机电流 3.14 V 2.38 V 3.14 V 2.38 V 3.14 V 2.38 V
最大压摆率 0.5 mA 0.425 mA 0.45 mA 0.475 mA 0.475 mA 0.45 mA
最大供电电压 (Vsup) 3.465 V 2.625 V 3.465 V 2.625 V 3.465 V 2.625 V
最小供电电压 (Vsup) 3.135 V 2.375 V 3.135 V 2.375 V 3.135 V 2.375 V
标称供电电压 (Vsup) 3.3 V 2.5 V 3.3 V 2.5 V 3.3 V 2.5 V
表面贴装 YES YES YES YES YES YES
技术 CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 INDUSTRIAL COMMERCIAL COMMERCIAL INDUSTRIAL INDUSTRIAL COMMERCIAL
端子面层 Matte Tin (Sn) - annealed Tin/Lead (Sn/Pb) Tin/Silver/Copper (Sn/Ag/Cu) Tin/Lead (Sn/Pb) TIN SILVER COPPER Tin/Lead (Sn/Pb)
端子形式 GULL WING GULL WING BALL GULL WING BALL BALL
端子节距 0.65 mm 0.65 mm 1 mm 0.65 mm 1.27 mm 1.27 mm
端子位置 QUAD QUAD BOTTOM QUAD BOTTOM BOTTOM
处于峰值回流温度下的最长时间 40 NOT SPECIFIED 10 30 40 NOT SPECIFIED
宽度 14 mm 14 mm 14 mm 14 mm 14 mm 14 mm
湿度敏感等级 3 - 3 - 3 3
Base Number Matches 1 1 1 1 - -
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