Datasheet> 器件分类 > 嵌入式处理器和控制器> 微控制器和处理器> RH80530GZ866512

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RH80530GZ866512: 产品描述Microprocessor, 32-Bit, 866MHz, CMOS, CPGA478, MICRO, FCPGA-478; 产品类别嵌入式处理器和控制器微控制器和处理器; 文件大小2MB，共93页; 制造商Intel(英特尔); 官网地址http://www.intel.com/; 标准

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RH80530GZ866512概述

Microprocessor, 32-Bit, 866MHz, CMOS, CPGA478, MICRO, FCPGA-478

RH80530GZ866512规格参数

参数名称	属性值
是否Rohs认证	符合
厂商名称	Intel(英特尔)
零件包装代码	PGA
包装说明	SPGA, PGA478,26X26,50
针数	478
Reach Compliance Code	unknown
ECCN代码	3A001.A.3
地址总线宽度	36
位大小	32
边界扫描	YES
最大时钟频率	133 MHz
外部数据总线宽度	64
格式	FLOATING POINT
集成缓存	YES
JESD-30 代码	S-CPGA-P478
长度	35 mm
低功率模式	YES
端子数量	478
封装主体材料	CERAMIC, METAL-SEALED COFIRED
封装代码	SPGA
封装等效代码	PGA478,26X26,50
封装形状	SQUARE
封装形式	GRID ARRAY, SHRINK PITCH
电源	1.25,1.4 V
认证状态	Not Qualified
座面最大高度	3.28 mm
速度	866 MHz
标称供电电压	1.4 V
表面贴装	NO
技术	CMOS
端子形式	PIN/PEG
端子节距	1.27 mm
端子位置	PERPENDICULAR
宽度	35 mm
uPs/uCs/外围集成电路类型	MICROPROCESSOR
Base Number Matches	1

文档解析

在这份数据手册中，电源管理状态主要影响处理器的性能和功耗。这些状态允许处理器在不同的使用场景下优化其性能和能源效率。以下是文档中提到的一些关键电源管理状态及其对处理器性能的影响：

正常状态（Normal State）：这是处理器的正常工作模式，其中处理器的核心时钟正在运行，处理器正在积极执行指令。
自动停止状态（Auto Halt State）：这是一种低功耗模式，可以通过执行HLT指令进入。通过软件控制进入空闲模式，减少功耗，但可以随时通过中断信号（如NMI、INTR等）快速恢复到正常状态。
快速启动状态（Quick Start State）：这是一种非常低功耗的状态，用于硬件控制的“空闲”计算机状态。在这种状态下，处理器能够快速响应系统总线优先设备的侦听事务，但对输入信号的响应能力有限。
深度睡眠状态（Deep Sleep State）：这是一种非常低功耗的状态，用于“开机挂起”计算机状态，是系统的一种替代关机的状态。在这种状态下，处理器停止时钟输入，但保持其上下文，以便能够快速恢复到正常状态。
更深睡眠状态（Deeper Sleep State）：这是处理器可以进入的最低功耗状态，同时保持其上下文。它在功能上与深度睡眠状态相同，但在更低的电压下运行，从而进一步降低功耗。
增强型Intel SpeedStep技术：这项技术支持处理器根据CPU需求实时动态切换电压和频率，通过切换总线比率、核心操作电压和核心处理器速度，而无需重置系统。

这些电源管理状态通过允许处理器在不同性能需求下调整其功耗，从而影响处理器的性能。例如，在高性能需求时，处理器可以工作在更高的频率和电压下；而在低性能需求或空闲时，处理器可以降低频率和电压，进入低功耗状态，以节省能源并减少热量产生。这种动态调整有助于提高移动设备的电池寿命和处理器的响应速度。

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Mobile Intel

Pentium

III Processor-M

Datasheet

January 2003

Order Number: 298340-006

Introduction

Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual

property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of Sale for such products, Intel assumes no liability

whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to

fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not intended

for use in medical, life saving, or life sustaining applications.

The information provided in this report, and related materials and presentations, are intended to illustrate the effects of certain design variables as

determined by modeling, and are neither a recommendation nor endorsement of any specific system-level design practices or targets. The model results

are based on a simulated notebook configuration, and do not describe or characterize the properties of any specific, existing system design. A detailed

description of the simulated notebook configuration is available upon request.

Intel may make changes to specifications and product descriptions at any time, without notice.

Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future

definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.

The Mobile Intel® Pentium® III Processor-M may contain design defects or errors known as errata which may cause the product to deviate from published

specifications. Current characterized errata are available on request.

Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.

Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be obtained from:

Intel Corporation

www.intel.com

or call 1-800-548-4725

Intel®, Pentium®, and Intel® SpeedStep®, and MMX™ technology are registered trademarks or trademarks of Intel Corporation and its subsidiaries in the

United States and other countries.

*Other names and brands may be claimed as the property of others.

Mobile Intel

Pentium

III Processor-M Datasheet

Introduction

Contents

Introduction .................................................................................................................................... 11

1.1

1.2

1.3

1.4

2.1

Overview .............................................................................................................. 12

State of the Data .................................................................................................. 12

Terminology ......................................................................................................... 13

References........................................................................................................... 13

New Features in the Mobile Pentium III Processor-M ......................................... 14

2.1.1 133-MHz PSB With AGTL Signaling....................................................... 14

2.1.2 512-K On-die Integrated L2 Cache......................................................... 14

2.1.3 Data Prefetch Logic ................................................................................ 14

2.1.4 Differential Clocking ................................................................................ 14

2.1.5 Deeper Sleep State................................................................................. 15

2.1.6 Signal Differences Between the Mobile Pentium III Processor (in

BGA2 and Micro-PGA2 Packages) and the Mobile Intel Pentium III

Processor-M............................................................................................ 15

Power Management............................................................................................. 15

2.2.1 Clock Control Architecture ...................................................................... 15

2.2.2 Normal State ........................................................................................... 15

2.2.3 Auto Halt State ........................................................................................ 16

2.2.4 Quick Start State..................................................................................... 17

2.2.5 HALT/Grant Snoop State ........................................................................ 18

2.2.6 Deep Sleep State.................................................................................... 18

2.2.7 Deeper Sleep State................................................................................. 18

2.2.8 Operating System Implications of Low-power States ............................. 19

2.2.9 Enhanced Intel SpeedStep Technology ................................................. 19

AGTL Signals ....................................................................................................... 19

Mobile Intel Pentium III Processor-M CPUID....................................................... 20

Processor System Signals ................................................................................... 21

3.1.1 Power Sequencing Requirements .......................................................... 22

3.1.2 Test Access Port (TAP) Connection ....................................................... 23

3.1.3 Catastrophic Thermal Protection ............................................................ 23

3.1.4 Unused Signals....................................................................................... 23

3.1.5 Signal State in Low-power States ........................................................... 23

3.1.5.1

System Bus Signals .............................................................. 23

3.1.5.2

CMOS and Open-drain Signals ............................................ 24

3.1.5.3

Other Signals ........................................................................ 24

Power Supply Requirements ............................................................................... 24

3.2.1 Decoupling Guidelines ............................................................................ 24

3.2.2 Voltage Planes........................................................................................ 25

3.2.3 Voltage Identification............................................................................... 25

System Bus Clock and Processor Clocking......................................................... 26

Mobile Intel Pentium III Processor-M Features.............................................................................. 14

2.2

2.3

2.4

3.1

Electrical Specifications ................................................................................................................. 21

3.2

3.3

Mobile Intel

Pentium

III Processor-M Datasheet

Introduction

3.4

3.5

3.6

3.7

Enhanced Intel SpeedStep Technology ...............................................................26

Maximum Ratings.................................................................................................27

DC Specifications .................................................................................................27

AC Specifications .................................................................................................37

3.7.1 System Bus, Clock, APIC, TAP, CMOS, and Open-drain AC

Specifications ..........................................................................................37

System Signal Simulations .............................................................................................................53

System Bus Clock (BCLK) and PICCLK DC Specifications and AC Signal

Quality Specifications ...........................................................................................53

4.2

AGTL AC Signal Quality Specifications................................................................55

4.3

Non-AGTL Signal Quality Specifications..............................................................56

4.3.1 PWRGOOD, VTTPWRGD Signal Quality Specifications........................57

4.3.1.1.1 VTTPWRGD Noise Parameter Specification...........57

4.3.1.2

VTTPWRGD Transition Parameter Recommendation..........58

4.3.1.2.1 Transition Region .....................................................58

4.3.1.2.2 Transition Time ........................................................58

4.3.1.2.3 Noise ........................................................................58

Mechanical Specifications ..............................................................................................................60

5.1

5.2

5.3

Socketable Micro-FCPGA Package .....................................................................60

Surface Mount Micro-FCBGA Package................................................................64

Signal Listings ......................................................................................................68

Thermal Diode ......................................................................................................76

Description............................................................................................................78

7.1.1 Quick Start Enable...................................................................................78

7.1.2 System Bus Frequency ...........................................................................78

7.1.3 APIC Enable ............................................................................................78

Clock Frequencies and Ratios .............................................................................78

Alphabetical Signal Reference .............................................................................79

Signal Summaries ................................................................................................89

Introduction..........................................................................................................91

Filter Specification ...............................................................................................91

Recommendation for Mobile Systems.................................................................92

Comments ...........................................................................................................93

4.1

Thermal Specifications ............................................................................................................75

6.1

7.1

Processor Initialization and Configuration ......................................................................................78

7.2

8.1

8.2

A1.

A2.

A3.

A4.

Processor Interface ........................................................................................................................79

Appendix A. PLL RLC Filter Specification ...................................................................................................91

Mobile Intel

Pentium

III Processor-M Datasheet

Introduction

Figures

Figure 1. Clock Control States .......................................................................................... 17

Figure 2. PLL RLC Filter ................................................................................................... 25

Figure 3. VTTPWRGD System-Level Connections .......................................................... 26

Figure 4. Illustration of V

Static and Transient Tolerances (VID = 1.40 V) .................. 31

Figure 5. Illustration of Deep Sleep V

Static and Transient Tolerances (VID Setting

= 1.40 V)............................................................................................................ 32

Figure 6. BCLK (Single Ended)/PICCLK/TCK Generic Clock Timing Waveform ............. 44

Figure 7. Differential BCLK/BCLK# Waveform (Common Mode) ..................................... 44

Figure 8. BCLK/BCLK# Waveform (Differential Mode)..................................................... 45

Figure 9. Valid Delay Timings ........................................................................................... 45

Figure 10. Setup and Hold Timings .................................................................................. 46

Figure 11. Cold/Warm Reset and Configuration Timings ................................................. 46

Figure 12. Power-on Sequence and Reset Timings ......................................................... 47

Figure 13. Power Down Sequencing and Timings (VCC Leading)................................... 48

Figure 14.Power Down Sequencing and Timings (V

CCT

Leading) .................................... 49

Figure 15.Test Timings (Boundary Scan) ......................................................................... 50

Figure 16. Test Reset Timings.......................................................................................... 50

Figure 17. Quick Start/Deep Sleep Timing (BCLK Stopping Method).............................. 51

Figure 18. Quick Start/Deep Sleep Timing (DPSLP# Assertion Method)......................... 51

Figure 19. Enhanced Intel SpeedStep Technology/Deep Sleep Timing .......................... 52

Figure 20. BCLK (Single Ended)/PICCLK Generic Clock Waveform ............................... 54

Figure 21. Maximum Acceptable Overshoot/Undershoot Waveform ............................... 55

Figure 22. VTTPWRGD Noise Specification .................................................................... 59

Figure 23. Socketable Micro-FCPGA Package – Top and Bottom Isometric Views ........ 61

Figure 24. Socketable Micro-FCPGA Package – Top and Side View .............................. 62

Figure 25. Socketable Micro-FCPGA Package – Bottom View ........................................ 63

Figure 26. Micro-FCBGA Package – Top and Bottom Isometric Views ........................... 65

Figure 27. Micro-FCBGA Package – Top and Side Views ............................................... 66

Figure 28. Micro-FCBGA Package – Bottom View ........................................................... 67

Figure 29. Pin/Ball Map – Top View.................................................................................. 68

Figure 30. PLL Filter Specifications .................................................................................. 92

Mobile Intel

Pentium

III Processor-M Datasheet

RH80530GZ866512相似产品对比

	RH80530GZ866512	RJ80530GZ866512	RJ80530LZ733512	RJ80530LZ001512
描述	Microprocessor, 32-Bit, 866MHz, CMOS, CPGA478, MICRO, FCPGA-478	Microprocessor, 32-Bit, 866MHz, CMOS, PBGA479, MICRO, FCBGA-479	Microprocessor, 32-Bit, 733MHz, CMOS, PBGA479, MICRO, FCBGA-479	Microprocessor, 32-Bit, 1000MHz, CMOS, CPGA478, MICRO, FCPGA-478
零件包装代码	PGA	BGA	BGA	PGA
包装说明	SPGA, PGA478,26X26,50	BGA, BGA479,26X26,50	BGA,	SPGA, PGA478,26X26,50
针数	478	479	479	478
Reach Compliance Code	unknown	unknown	unknown	unknow
ECCN代码	3A001.A.3	3A001.A.3	3A001.A.3	3A001.A.3
地址总线宽度	36	36	36	36
位大小	32	32	32	32
边界扫描	YES	YES	YES	YES
最大时钟频率	133 MHz	133 MHz	133 MHz	133 MHz
外部数据总线宽度	64	64	64	64
格式	FLOATING POINT	FLOATING POINT	FLOATING POINT	FLOATING POINT
集成缓存	YES	YES	YES	YES
JESD-30 代码	S-CPGA-P478	S-PBGA-B479	S-PBGA-B479	S-CPGA-P478
长度	35 mm	35 mm	35 mm	35 mm
低功率模式	YES	YES	YES	YES
端子数量	478	479	479	478
封装主体材料	CERAMIC, METAL-SEALED COFIRED	PLASTIC/EPOXY	PLASTIC/EPOXY	CERAMIC, METAL-SEALED COFIRED
封装代码	SPGA	BGA	BGA	SPGA
封装形状	SQUARE	SQUARE	SQUARE	SQUARE
封装形式	GRID ARRAY, SHRINK PITCH	GRID ARRAY	GRID ARRAY	GRID ARRAY, SHRINK PITCH
认证状态	Not Qualified	Not Qualified	Not Qualified	Not Qualified
速度	866 MHz	866 MHz	733 MHz	1000 MHz
标称供电电压	1.4 V	1.4 V	1.15 V	1.15 V
表面贴装	NO	YES	YES	NO
技术	CMOS	CMOS	CMOS	CMOS
端子形式	PIN/PEG	BALL	BALL	PIN/PEG
端子节距	1.27 mm	1.27 mm	1.27 mm	1.27 mm
端子位置	PERPENDICULAR	BOTTOM	BOTTOM	PERPENDICULAR
宽度	35 mm	35 mm	35 mm	35 mm
uPs/uCs/外围集成电路类型	MICROPROCESSOR	MICROPROCESSOR	MICROPROCESSOR	MICROPROCESSOR
是否Rohs认证	符合	不符合	-	不符合
封装等效代码	PGA478,26X26,50	BGA479,26X26,50	-	PGA478,26X26,50
电源	1.25,1.4 V	1.25,1.4 V	-	1.25,1.4 V
座面最大高度	3.28 mm	2.77 mm	2.77 mm	-
Base Number Matches	1	1	1	-

RH80530GZ866512

RH80530GZ866512概述

RH80530GZ866512规格参数

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RH80530GZ866512相似产品对比

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