Datasheet> 器件分类 > 可编程逻辑器件> 可编程逻辑> RT3PE600L-1CQ256B

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RT3PE600L-1CQ256B: 产品描述Field Programmable Gate Array, 13824 CLBs, 600000 Gates, 250MHz, 13824-Cell, CMOS, CQFP256, CERAMIC, MO-134AB, QFP-256; 产品类别可编程逻辑器件可编程逻辑; 文件大小5MB，共144页; 制造商Actel; 官网地址http://www.actel.com/

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RT3PE600L-1CQ256B概述

Field Programmable Gate Array, 13824 CLBs, 600000 Gates, 250MHz, 13824-Cell, CMOS, CQFP256, CERAMIC, MO-134AB, QFP-256

RT3PE600L-1CQ256B规格参数

参数名称	属性值
是否Rohs认证	不符合
包装说明	CERAMIC, MO-134AB, QFP-256
Reach Compliance Code	unknown
最大时钟频率	250 MHz
JESD-30 代码	S-CQFP-F256
长度	36 mm
可配置逻辑块数量	13824
等效关口数量	600000
逻辑单元数量	13824
端子数量	256
最高工作温度	125 °C
最低工作温度	-55 °C
组织	13824 CLBS, 600000 GATES
封装主体材料	CERAMIC, METAL-SEALED COFIRED
封装代码	QFF
封装等效代码	TPAK256,3SQ,20
封装形状	SQUARE
封装形式	FLATPACK
电源	1.2/1.5,1.2/3.3 V
可编程逻辑类型	FIELD PROGRAMMABLE GATE ARRAY
认证状态	Not Qualified
筛选级别	MIL-STD-883 Class B
座面最大高度	3.3 mm
最大供电电压	1.575 V
最小供电电压	1.14 V
标称供电电压	1.425 V
表面贴装	YES
技术	CMOS
温度等级	MILITARY
端子形式	FLAT
端子节距	0.5 mm
端子位置	QUAD
宽度	36 mm
Base Number Matches	1

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Advance v0.2

Radiation-Tolerant ProASIC3 Low-Power Space-

Flight Flash FPGAs

with Flash*Freeze Technology

Features and Benefits

MIL-STD-883 Class B Qualified Packaging

• Ceramic Column Grid Array with Six Sigma Copper-

Wrapped Lead-Tin Columns

• Land Grid Array

• High-Performance, Low-Skew Global Network

• Architecture Supports Ultra-High Utilization

Advanced and Pro (Professional) I/Os

• 700 Mbps DDR, LVDS-Capable I/Os

• 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V Mixed-Voltage

Operation

• Bank-Selectable I/O Voltages—up to 8 Banks per Chip

• Single-Ended I/O Standards: LVTTL, LVCMOS 3.3 V /

2.5 V / 1.8 V / 1.5 V / 1.2 V, 3.3 V PCI / 3.3 V PCI-X, and

LVCMOS 2.5 V / 5.0 V Input

• Differential I/O Standards: LVPECL, LVDS, B-LVDS, and M-LVDS

• Voltage-Referenced I/O Standards: GTL+ 2.5 V / 3.3 V, GTL

2.5 V / 3.3 V, HSTL Class I and II, SSTL2 Class I and II, SSTL3

Class I and II (RT3PE3000L only)

• I/O Registers on Input, Output, and Enable Paths

• Hot-Swappable and Cold-Sparing I/Os

• Programmable Output Slew Rate and Drive Strength

• Programmable Input Delay (RT3PE3000L only)

• Schmitt Trigger Option on Single-Ended Inputs

(RT3PE3000L)

• Weak Pull-Up/-Down

• IEEE 1149.1 (JTAG) Boundary Scan Test

• Pin-Compatible Packages across the Radiation-Tolerant

ProASIC

3 Family

Low Power

• Dramatic Reduction in Dynamic and Static Power

• 1.2 V to 1.5 V Core and I/O Voltage Support for Low

Power

• Low Power Consumption in Flash*Freeze Mode Enables

Instantaneous Entry To / Exit From Low-Power

Flash*Freeze Mode

• Supports Single-Voltage System Operation

• Low-Impedance Switches

Radiation Tolerant

• 15 krad Total Ionizing Dose (TID)

• Wafer-Lot-Specific TID Reports

High Capacity

• 600 k to 3 M System Gates

• Up to 504 kbits of True Dual-Port SRAM

• Up to 620 User I/Os

Reprogrammable Flash Technology

• 130-nm, 7-Layer Metal (6 Copper), Flash-Based CMOS

Process

• Live-at-Power-Up (LAPU) Level 0 Support

• Single-Chip Solution

• Retains Programmed Design when Powered Off

Clock Conditioning Circuit (CCC) and PLL

• Six CCC Blocks, All with Integrated PLL (RT ProASIC3)

• Configurable Phase Shift, Multiply/Divide, Delay

Capabilities, and External Feedback

• Wide Input Frequency Range 1.5 MHz to 250 MHz (1.2 V

systems) and 350 MHz (1.5 V systems)

High Performance

• 350 MHz (1.5 V) and 250 MHz (1.2 V) System Performance

• 3.3 V, 66 MHz, 66-Bit PCI (1.5 V); 66 MHz, 32-Bit PCI (1.2 V)

SRAMs and FIFOs

• Variable-Aspect-Ratio 4,608-Bit RAM Blocks (×1, ×2, ×4,

×9, and ×18 organizations available)

• True Dual-Port SRAM (except ×18)

• 24 SRAM and FIFO Blocks with Synchronous Operation:

– 250 MHz: For 1.2 V Systems

– 350 MHz: For 1.5 V Systems

RT3PE3000L

75,264

504

112

Yes

620

CG/LG484, CG/LG896

CQ256

In-System Programming (ISP) and Security

• Secure ISP Using On-Chip 128-Bit Advanced Encryption

Standard (AES) Decryption via JTAG (IEEE 1532–compliant)

• FlashLock

to Secure FPGA Contents

High-Performance Routing Hierarchy

• Segmented, Hierarchical Routing and Clock Structure

RT ProASIC3 Devices

System Gates

VersaTiles (D-flip-flops)

RAM kbits (1,024 bits)

4,608-Bit Blocks

FlashROM Bits

Secure (AES) ISP

Integrated PLL in CCCs

VersaNet Globals

I/O Banks

Maximum User I/Os

Package Pins

CCGA/LGA

CQFP

RT3PE600L

600 k

13,824

108

Yes

270

CG/LG484

CQ256

Table I-1 •

Radiation-Tolerant (RT) ProASIC3 Low-Power Space-Flight FPGAs

November 2009

1 – Radiation-Tolerant ProASIC3 Low-Power Space-

Flight FPGA Overview

General Description

The radiation-tolerant (RT) ProASIC3 family of Actel flash FPGAs dramatically reduces dynamic

power consumption by 40% and static power by 50%. These power savings are coupled with

performance, density, true single chip, 1.2 V to 1.5 V core and I/O operation, reprogrammability,

and advanced features. The RT ProASIC3 FPGA is based on Actel's ProASIC3EL family of low-power

FPGAs.

Actel's proven Flash*Freeze technology enables RT ProASIC3 device users to shut off dynamic

power instantaneously and switch the device to static mode without the need to switch off clocks

or power supplies, and retaining internal states of the device. This greatly simplifies power

management. In addition, optimized software tools using power-driven layout provide instant

push-button power reduction.

Nonvolatile flash technology gives RT ProASIC3 devices the advantage of being a secure, low-

power, single-chip solution that is live at power-up (LAPU). RT ProASIC3 devices offer dramatic

dynamic power savings, giving FPGA users flexibility to combine low power with high performance.

These features enable designers to create high-density systems using existing ASIC or FPGA design

flows and tools.

RT ProASIC3 devices offer 1 kbit of on-chip, reprogrammable, nonvolatile FlashROM storage as well

as clock conditioning circuitry (CCC) based on an integrated phase-locked loop (PLL). RT ProASIC3

devices support devices from 600 k system gates to 3 million system gates with up to 504 kbits of

true dual-port SRAM and 620 user I/Os.

Flash*Freeze Technology

RT ProASIC3 devices offer Actel's proven Flash*Freeze technology, which allows instantaneous

switching from an active state to a static state. When Flash*Freeze mode is activated, RT ProASIC3

devices enter a static state while retaining the contents of registers and SRAM. Power is conserved

without the need for additional external components to turn off I/Os or clocks. Flash*Freeze

technology is combined with in-system programmability, which enables users to quickly and easily

upgrade and update their designs in the final stages of manufacturing or in the field. The ability of

RT ProASIC3 devices to support a 1.2 V core voltage allows for an even greater reduction in power

consumption, which enables low total system power.

When the RT ProASIC3 device enters Flash*Freeze mode, the device automatically shuts off the

clocks and inputs to the FPGA core; when the device exits Flash*Freeze mode, all activity resumes

and data is retained.

The availability of low-power modes, combined with a reprogrammable, single-chip, single-voltage

solution, make RT ProASIC3 devices suitable for low-power data transfer and manipulation in

military-temperature applications where available power may be limited (e.g., in battery-powered

equipment); or where heat dissipation may be limited (e.g., in enclosures with no forced cooling).

Flash Advantages

Low Power

The RT ProASIC3 family of Actel flash-based FPGAs provides a low-power advantage, and when

coupled with high performance, enables designers to make power-smart choices using a single-

chip, reprogrammable, and live-at-power-up device.

RT ProASIC3 devices offer 40% dynamic power and 50% static power savings by reducing the core

operating voltage to 1.2 V. In addition, the power-driven layout (PDL) feature in Libero

Integrated

Design Environment (IDE) offers up to 30% additional power reduction. With Flash*Freeze

A dv a n c e v 0. 2

1-1

RT3PE600L-1CQ256B相似产品对比

	RT3PE600L-1CQ256B	RT3PE600L-CQ256B	RT3PE3000L-1CQ256B	RT3PE3000L-CQ256B
描述	Field Programmable Gate Array, 13824 CLBs, 600000 Gates, 250MHz, 13824-Cell, CMOS, CQFP256, CERAMIC, MO-134AB, QFP-256	Field Programmable Gate Array, 13824 CLBs, 600000 Gates, 250MHz, 13824-Cell, CMOS, CQFP256, CERAMIC, MO-134AB, QFP-256	Field Programmable Gate Array, 75264 CLBs, 3000000 Gates, 250MHz, 75264-Cell, CMOS, CQFP256, CERAMIC, MO-134AB, QFP-256	Field Programmable Gate Array, 75264 CLBs, 3000000 Gates, 250MHz, 75264-Cell, CMOS, CQFP256, CERAMIC, MO-134AB, QFP-256
是否Rohs认证	不符合	不符合	不符合	不符合
包装说明	CERAMIC, MO-134AB, QFP-256	CERAMIC, MO-134AB, QFP-256	CERAMIC, MO-134AB, QFP-256	CERAMIC, MO-134AB, QFP-256
Reach Compliance Code	unknown	unknown	unknow	unknow
最大时钟频率	250 MHz	250 MHz	250 MHz	250 MHz
JESD-30 代码	S-CQFP-F256	S-CQFP-F256	S-CQFP-F256	S-CQFP-F256
长度	36 mm	36 mm	36 mm	36 mm
可配置逻辑块数量	13824	13824	75264	75264
等效关口数量	600000	600000	3000000	3000000
逻辑单元数量	13824	13824	75264	75264
端子数量	256	256	256	256
最高工作温度	125 °C	125 °C	125 °C	125 °C
最低工作温度	-55 °C	-55 °C	-55 °C	-55 °C
组织	13824 CLBS, 600000 GATES	13824 CLBS, 600000 GATES	75264 CLBS, 3000000 GATES	75264 CLBS, 3000000 GATES
封装主体材料	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
封装代码	QFF	QFF	QFF	QFF
封装等效代码	TPAK256,3SQ,20	TPAK256,3SQ,20	TPAK256,3SQ,20	TPAK256,3SQ,20
封装形状	SQUARE	SQUARE	SQUARE	SQUARE
封装形式	FLATPACK	FLATPACK	FLATPACK	FLATPACK
电源	1.2/1.5,1.2/3.3 V	1.2/1.5,1.2/3.3 V	1.2/1.5,1.2/3.3 V	1.2/1.5,1.2/3.3 V
可编程逻辑类型	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY
认证状态	Not Qualified	Not Qualified	Not Qualified	Not Qualified
筛选级别	MIL-STD-883 Class B	MIL-STD-883 Class B	MIL-STD-883 Class B	MIL-STD-883 Class B
座面最大高度	3.3 mm	3.3 mm	3.3 mm	3.3 mm
最大供电电压	1.575 V	1.575 V	1.575 V	1.575 V
最小供电电压	1.14 V	1.14 V	1.14 V	1.14 V
标称供电电压	1.425 V	1.425 V	1.425 V	1.425 V
表面贴装	YES	YES	YES	YES
技术	CMOS	CMOS	CMOS	CMOS
温度等级	MILITARY	MILITARY	MILITARY	MILITARY
端子形式	FLAT	FLAT	FLAT	FLAT
端子节距	0.5 mm	0.5 mm	0.5 mm	0.5 mm
端子位置	QUAD	QUAD	QUAD	QUAD
宽度	36 mm	36 mm	36 mm	36 mm

RT3PE600L-1CQ256B

RT3PE600L-1CQ256B概述

RT3PE600L-1CQ256B规格参数

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