SCV64™ User Manual
http://www.silicon360.com
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SCV64™ User Manual
Copyright 2013,
Silicon360
All rights reserved.
Table of Contents
1
General Information ............................................................................................ 1-1
1.1
1.2
1.3
1.4
Introduction............................................................................................. 1-1
Product Overview ................................................................................... 1-1
1.2.1
Flexibility and Features.......................................................... 1-1
Using This Document ............................................................................. 1-4
Conventions ............................................................................................ 1-5
1.4.1
1.4.2
1.4.3
2
Signals .................................................................................... 1-5
Symbols.................................................................................. 1-5
Mathematical Notation........................................................... 1-5
Functional Description......................................................................................... 2-1
2.1
Introduction............................................................................................. 2-1
2.1.1
2.1.2
2.1.2.1
2.1.2.2
2.1.2.3
2.2
2.2.1
2.2.2
2.2.2.1
2.2.2.2
2.2.3
2.2.3.1
2.2.3.2
2.2.3.3
2.2.4
2.2.4.1
2.2.4.2
Organization of the Functional Description........................... 2-1
Functional Overview.............................................................. 2-2
Data Path ............................................................................... 2-2
VMEbus Interface ................................................................. 2-5
Local Bus Interface ............................................................... 2-6
Function.................................................................................. 2-8
Bus Request Modes................................................................ 2-9
Fair and Demand Modes ....................................................... 2-9
VMEbus Request Levels....................................................... 2-9
Bus Release Modes .............................................................. 2-10
Bus Clear Enabling ............................................................. 2-10
Release On Request and Release When Done .................... 2-10
Ownership Timer ................................................................ 2-11
Other Bus Release Mechanisms........................................... 2-11
Local Memory Interrupt ...................................................... 2-11
BI-Mode .............................................................................. 2-12
VMEbus Requester ................................................................................. 2-8
iii
2.2.4.3
2.3
2.3.1
2.3.1.1
2.3.1.2
2.3.1.3
2.3.2
2.4
2.4.1
2.4.1.1
2.4.2
2.4.2.1
2.4.2.2
2.4.2.3
2.4.2.4
2.5
2.5.1
2.5.2
2.5.3
2.5.3.1
2.5.3.2
2.5.3.3
2.5.4
2.5.5
2.5.6
2.5.6.1
2.5.6.2
2.5.7
2.6
2.6.1
2.6.1.1
Local and System Reset ....................................................... 2-12
VMEbus Interrupts ...............................................................2-13
Interrupt Generation............................................................. 2-13
BI-mode Effects ................................................................... 2-14
Reset Effects ........................................................................ 2-14
Local Bus Interrupts..............................................................2-15
Interrupt Enabling and Status ...............................................2-20
Local Interrupt Level Mapping............................................ 2-21
Interrupt Acknowledge Cycles .............................................2-22
Auto-Vectored Interrupts ..................................................... 2-25
Vectored Interrupts .............................................................. 2-26
BI-Mode Effects .................................................................. 2-29
Reset Effects ........................................................................ 2-29
Syscon Determination...........................................................2-30
IACK Daisy Chain Driver ....................................................2-31
VMEbus Arbiter ...................................................................2-31
Arbitration Modes............................................................... 2-31
Arbitration Time-out............................................................ 2-33
Reset Effects ........................................................................ 2-33
Bus Timer .............................................................................2-34
System Clock Driver.............................................................2-34
External Inputs ......................................................................2-34
External Status ..................................................................... 2-34
Off-Board Reset Input ......................................................... 2-35
Reset Effects on Syscon Functions .......................................2-35
SCV64 as VME Slave...........................................................2-39
Coupled Mode...................................................................... 2-39
Interrupter .............................................................................................. 2-13
Interrupt Handler ................................................................................... 2-18
System Controller Functions ................................................................. 2-30
Data Path................................................................................................ 2-36
iv
2.6.1.2
2.6.2
2.6.2.1
2.6.2.2
2.6.2.3
2.7
2.7.1
2.7.2
2.7.2.1
2.7.2.2
2.8
2.8.1
2.8.1.1
2.8.1.2
2.8.1.3
2.8.1.4
2.8.1.5
2.8.2
2.8.2.1
2.8.2.2
2.8.2.3
2.8.3
2.8.4
2.8.5
2.8.6
2.8.7
2.8.8
2.9
2.9.1
2.9.1.1
2.9.1.2
Decoupled Mode ................................................................. 2-39
SCV64 as VME Master........................................................ 2-41
Coupled Mode..................................................................... 2-41
Decoupled Mode ................................................................. 2-42
DMA Transfers ................................................................... 2-43
CPU Memory Map............................................................... 2-45
VME Slave Memory Map.................................................... 2-49
Automatic Base Address Programming .............................. 2-51
Access Protection ................................................................ 2-52
SCV64 as VME Master........................................................ 2-53
Address Translation ............................................................ 2-53
Byte Lane Translation ......................................................... 2-54
VMEbus Mastership............................................................ 2-56
RMW Cycles....................................................................... 2-57
Termination of a Master Cycle with RETRY* ................... 2-58
SCV64 as VME Slave.......................................................... 2-58
Address Translation ............................................................ 2-58
Byte Lane Translation ......................................................... 2-59
Local Bus Mastership.......................................................... 2-60
DMA Transfers .................................................................... 2-61
Master/Slave Deadlock Resolution ...................................... 2-61
Location Monitor Access ..................................................... 2-62
Bus Busy Glitch ................................................................... 2-63
BI-Mode Effects................................................................... 2-63
Bus Error Handling .............................................................. 2-64
Local Bus Arbitration........................................................... 2-66
Local Arbiter Bypassed....................................................... 2-66
Local Arbiter Active ........................................................... 2-67
Memory Mapping ................................................................................. 2-45
VMEbus Interface ................................................................................. 2-53
Local Bus Interface ............................................................................... 2-66
v