74AHC125; 74AHCT125
Quad buffer/line driver; 3-state
Rev. 04 — 11 January 2008
Product data sheet
1. General description
The 74AHC125; 74AHCT125 is a high-speed Si-gate CMOS device and is pin compatible
with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC
standard JESD7-A.
The 74AHC125; 74AHCT125 provides four non-inverting buffer/line drivers with 3-state
outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE). A HIGH
at nOE causes the outputs to assume a high-impedance OFF-state.
The 74AHC125; 74AHCT125 is identical to the 74AHC126; 74AHCT126 but has active
LOW enable inputs.
2. Features
s
s
s
s
s
s
Balanced propagation delays
All inputs have a Schmitt-trigger action
Inputs accepts voltages higher than V
CC
For 74AHC125 only: operates with CMOS input levels
For 74AHCT125 only: operates with TTL input levels
ESD protection:
x
HBM JESD22-A114E exceeds 2000 V
x
MM JESD22-A115-A exceeds 200 V
x
CDM JESD22-C101C exceeds 1000 V
s
Multiple package options
s
Specified from
−40 °C
to +85
°C
and from
−40 °C
to +125
°C
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
74AHC125D
74AHCT125D
74AHC125PW
74AHCT125PW
74AHC125BQ
74AHCT125BQ
−40 °C
to +125
°C
−40 °C
to +125
°C
TSSOP14
−40 °C
to +125
°C
Name
SO14
Description
plastic small outline package; 14 leads;
body width 3.9 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
Version
SOT108-1
SOT402-1
SOT762-1
Type number
DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.5
×
3
×
0.85 mm
NXP Semiconductors
74AHC125; 74AHCT125
Quad buffer/line driver; 3-state
4. Functional diagram
2
1
5
4
9
10
12
13
1A
1OE
2A
2OE
1Y
3
2
1
3
2Y
6
1
5
EN1
6
4
3A
3OE
4A
4OE
mna228
3Y
8
9
8
10
4Y
11
12
11
13
nA
nY
nOE
mna229
mna227
Fig 1. Logic symbol
Fig 2. IEC logic symbol
Fig 3. Logic diagram (one buffer)
5. Pinning information
5.1 Pinning
74AHC125
74AHCT125
1OE
2
3
4
5
6
7
GND
3Y
8
GND
(1)
1
terminal 1
index area
1A
14 V
CC
13 4OE
12 4A
11 4Y
10 3OE
9
8
001aae755
74AHC125
74AHCT125
1OE
1A
1Y
2OE
2A
2Y
GND
1
2
3
4
5
6
7
14 V
CC
13 4OE
12 4A
11 4Y
10 3OE
9
3A
1Y
2OE
2A
2Y
3A
3Y
001aah082
Transparent top view
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as
a supply pin or input.
Fig 4. Pin configuration SO14 and TSSOP14
Fig 5. Pin configuration DHVQFN14
74AHC_AHCT125_4
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 11 January 2008
2 of 15
NXP Semiconductors
74AHC125; 74AHCT125
Quad buffer/line driver; 3-state
5.2 Pin description
Table 2.
Symbol
1OE
1A
1Y
2OE
2A
2Y
GND
3Y
3A
3OE
4Y
4A
4OE
V
CC
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Description
output enable input (active LOW)
data input
data output
output enable input (active LOW)
data input
data output
ground (0 V)
data output
data input
output enable input (active LOW)
data output
data input
output enable input (active LOW)
supply voltage
6. Functional description
Table 3.
Control
nOE
L
H
[1]
H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
Function table
[1]
Input
nA
L
H
X
Output
nY
L
H
Z
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
V
I
I
IK
I
OK
I
O
I
CC
I
GND
74AHC_AHCT125_4
Parameter
supply voltage
input voltage
input clamping current
output clamping current
output current
supply current
ground current
Conditions
Min
−0.5
−0.5
Max
+7.0
+7.0
-
±20
±25
75
-
Unit
V
V
mA
mA
mA
mA
mA
V
I
<
−0.5
V
V
O
<
−0.5
V or V
O
> V
CC
+ 0.5 V
V
O
=
−0.5
V to (V
CC
+ 0.5 V)
[1]
[1]
−20
-
-
-
−75
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 11 January 2008
3 of 15
NXP Semiconductors
74AHC125; 74AHCT125
Quad buffer/line driver; 3-state
Table 4.
Limiting values
…continued
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
T
stg
P
tot
Parameter
storage temperature
total power dissipation
SO14 package
TSSOP14 package
DHVQFN14 package
[1]
[2]
[3]
[4]
Conditions
T
amb
=
−40 °C
to +125
°C
[2]
[3]
[4]
Min
−65
-
-
-
Max
+150
500
500
500
Unit
°C
mW
mW
mW
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
P
tot
derates linearly with 8 mW/K above 70
°C.
P
tot
derates linearly with 5.5 mW/K above 60
°C.
P
tot
derates linearly with 4.5 mW/K above 60
°C.
8. Recommended operating conditions
Table 5.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
CC
V
I
V
O
T
amb
∆t/∆V
supply voltage
input voltage
output voltage
ambient temperature
input transition rise
and fall rate
V
CC
= 3.3 V
±
0.3 V
V
CC
= 5.0 V
±
0.5 V
Conditions
Min
2.0
0
0
−40
-
-
74AHC125
Typ
5.0
-
-
+25
-
-
Max
5.5
5.5
V
CC
+125
100
20
Min
4.5
0
0
−40
-
-
74AHCT125
Typ
5.0
-
-
+25
-
-
Max
5.5
5.5
V
CC
+125
-
20
V
V
V
°C
ns/V
ns/V
Unit
9. Static characteristics
Table 6.
Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
For type 74AHC125
V
IH
HIGH-level
input voltage
V
CC
= 2.0 V
V
CC
= 3.0 V
V
CC
= 5.5 V
V
IL
LOW-level
input voltage
V
CC
= 2.0 V
V
CC
= 3.0 V
V
CC
= 5.5 V
1.5
2.1
3.85
-
-
-
-
-
-
-
-
-
-
-
-
0.5
0.9
1.65
1.5
2.1
3.85
-
-
-
-
-
-
0.5
0.9
1.65
1.5
2.1
3.85
-
-
-
-
-
-
0.5
0.9
1.65
V
V
V
V
V
V
Conditions
Min
25
°C
Typ
Max
−40 °C
to +85
°C −40 °C
to +125
°C
Unit
Min
Max
Min
Max
74AHC_AHCT125_4
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 11 January 2008
4 of 15
NXP Semiconductors
74AHC125; 74AHCT125
Quad buffer/line driver; 3-state
Table 6.
Static characteristics
…continued
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
OH
Conditions
Min
HIGH-level
V
I
= V
IH
or V
IL
output voltage
I
O
=
−50 µA;
V
CC
= 2.0 V
I
O
=
−50 µA;
V
CC
= 3.0 V
I
O
=
−50 µA;
V
CC
= 4.5 V
I
O
=
−4.0
mA; V
CC
= 3.0 V
I
O
=
−8.0
mA; V
CC
= 4.5 V
V
OL
LOW-level
V
I
= V
IH
or V
IL
output voltage
I
O
= 50
µA;
V
CC
= 2.0 V
I
O
= 50
µA;
V
CC
= 3.0 V
I
O
= 50
µA;
V
CC
= 4.5 V
I
O
= 4.0 mA; V
CC
= 3.0 V
I
O
= 8.0 mA; V
CC
= 4.5 V
I
OZ
OFF-state
V
I
= V
IH
or V
IL
;
output current V
O
= V
CC
or GND;
V
CC
= 5.5 V
input leakage
current
V
I
= 5.5 V or GND;
V
CC
= 0 V to 5.5 V
1.9
2.9
4.4
2.58
3.94
-
-
-
-
-
-
25
°C
Typ
2.0
3.0
4.5
-
-
0
0
0
-
-
-
Max
-
-
-
-
-
0.1
0.1
0.1
0.36
0.36
±0.25
−40 °C
to +85
°C −40 °C
to +125
°C
Unit
Min
1.9
2.9
4.4
2.48
3.8
-
-
-
-
-
-
Max
-
-
-
-
-
0.1
0.1
0.1
0.44
0.44
±2.5
Min
1.9
2.9
4.4
2.40
3.70
-
-
-
-
-
-
Max
-
-
-
-
-
0.1
0.1
0.1
0.55
0.55
±10.0
V
V
V
V
V
V
V
V
V
V
µA
I
I
I
CC
C
I
C
O
-
-
-
-
-
-
3.0
4.0
0.1
2.0
10
-
-
-
-
-
1.0
20
10
-
-
-
-
-
2.0
40
10
-
µA
µA
pF
pF
supply current V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 5.5 V
input
capacitance
output
capacitance
HIGH-level
input voltage
LOW-level
input voltage
V
CC
= 4.5 V to 5.5 V
V
CC
= 4.5 V to 5.5 V
For type 74AHCT125
V
IH
V
IL
V
OH
2.0
-
-
-
-
0.8
2.0
-
-
0.8
2.0
-
-
0.8
V
V
HIGH-level
V
I
= V
IH
or V
IL
; V
CC
= 4.5 V
output voltage
I
O
=
−50 µA
I
O
=
−8.0
mA
LOW-level
V
I
= V
IH
or V
IL
; V
CC
= 4.5 V
output voltage
I
O
= 50
µA
I
O
= 8.0 mA
OFF-state
per input pin; V
I
= V
IH
or V
IL
;
output current V
CC
= 5.5 V; I
O
= 0 A
V
O
= V
CC
or GND;
other pins at V
CC
or GND
4.4
3.94
-
-
-
4.5
-
0
-
-
-
-
0.1
0.36
±0.25
4.4
3.8
-
-
-
-
-
0.1
0.44
±2.5
4.4
3.70
-
-
-
-
-
0.1
0.55
±10.0
V
V
V
V
µA
V
OL
I
OZ
I
I
I
CC
input leakage
current
V
I
= 5.5 V or GND;
V
CC
= 0 V to 5.5 V
-
-
-
-
0.1
2.0
-
-
1.0
20
-
-
2.0
40
µA
µA
supply current V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 5.5 V
74AHC_AHCT125_4
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 11 January 2008
5 of 15
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