Single-chip Type with Built-in FET Switching Regulators
Simple Step-down
Switching Regulator
with Built-in Power MOSFET
BD9329AEFJ
No.11027EAT56
●Description
The BD9329AEFJ is a synchronous step-down switching regulator that integrates 2 low resistance N-channel MOSFETs.
It achieves 3A continuous output current over a wide input supply range. Current mode operation provides fast transient
response and easy phase compensation.
●Features
1) Wide operating INPUT Range 4.2V½18.0V
2) 3A Output Current
3) Hi-side / Lo-side FET ON-resistance; 0.15 / 0.13Ω Power Switch
4) Low ESR Output Ceramic Capacitors are Available
5) Low Standby Current during Shutdown Mode
6) 380 kHz Fixed Operating Frequency
7) Feedback voltage 0.9V ±1.5% Accuracy at room temp. (±2.0% guaranteed for -25℃ to 85℃ temperature range)
8) Protection Circuits
Under Voltage Lockout Protection
Thermal Shutdown
Over Current Protection
9) HTSOP-J8 Package with Exposed thermal PAD.
●Applications
Distributed Power System
Pre-Regulator for Linear Regulator
●Absolute
maximum ratings (Ta = 25℃)
Parameter
Supply Voltage
Switch Voltage
Power Dissipation for HTSOP-J8
Package thermal resistance
θja
*2
Package thermal resistance
θjc
*2
Operating Temperature Range
Storage Temperature Range
Junction Temperature
BST Voltage
EN Voltage
All other pins
Symbol
VIN
V
SW
Pd
θja
θjc
Topr
Tstg
Tjmax
V
BST
V
EN
V
OTH
Ratings
20
20
3760
*1
29.27
3.75
-40½+85
-55½+150
150
V
SW
+7
20
20
Unit
V
V
mW
℃/W
℃/W
℃
℃
℃
V
V
V
*1 Derating in done 30.08 mW/℃ for operating above Ta≧25℃(Mount on 4-layer 70.0mm×70.0mm×1.6mm board)
*2 Mount on 4-layer 50mm x 30mm x 1.6mm application board
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© 2011 ROHM Co., Ltd. All rights reserved.
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BD9329AEFJ
●Operation
Range (Ta= -40½85℃)
Parameter
Supply Voltage
SW Voltage
Output current
Output voltage range
Symbol
V
IN
V
SW
I
SW3
V
RANGE
Ratings
Min
4.2
-0.5
-
0.9
Typ
12
-
-
-
Max
18
18
3
V
IN
x 0.7
Unit
V
V
A
V
Technical Note
●Electrical
characteristics (Unless otherwise specified VIN=12V Ta=25℃)
Limits
Parameter
Symbol
Min
Typ
Error amplifier block
FB input bias current
Feedback voltage1
Feedback voltage2
SW block – SW
Hi-side FET On-resistance
Lo-side FET On-resistance
Hi/Lo-side FET Leak current
Switch Current Limit
Maximum duty cycle
General
Enable Sink current
Enable Threshold voltage
Under Voltage Lockout threshold
Under Voltage Lockout Hysteresis
Soft Start Current
Soft Start Time
Operating Frequency
Circuit Current
Quiescent Current
I
EN
V
EN
V
UVLO
V
HYS
I
SS
T
SS
F
OSC
I
CC
I
QUI
90
1.0
3.5
-
5
-
300
-
-
180
1.2
3.75
0.3
10
22
380
1.2
15
R
ONH
R
ONL
I
LEAKN
I
LIMIT3
M
DUTY
-
-
-
3.5
-
0.15
0.13
0
-
90
I
FB
V
FB1
V
FB2
-
0.886
0.882
0.02
0.900
0.900
Max
Unit
Conditions
2
0.914
0.918
µA
V
V
Voltage follower
Ta=-25℃½85℃
-
-
10
-
-
Ω
Ω
µA
A
%
I
SW
= -0.8A
I
SW
= 0.8A
V
IN
= 18V,
V
SW
= 0V / 18V
V
FB
= 0V
270
1.4
4.0
-
15
-
460
3
27
µA
V
V
V
µA
ms
kHz
mA
µA
V
EN
= 12V
V
IN
rising
V
SS
= 0 V
C
SS
= 0.1 µF
V
FB
= 1.5V, V
EN
= 12V
V
EN
= 0V
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© 2011 ROHM Co., Ltd. All rights reserved.
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BD9329AEFJ
●Block
Diagram
VIN
EN
VREF
OSC
VREG
5V
BST
OCP
UVLO
IBIAS
FB
+
+
ERR
Technical Note
12V
VIN
TSD
S
DRV
SLOPE
LOGIC
R
LVS
SW
OUTPUT
-
COMP
+
PWM
-
LVS
SS
Soft Start
GND
Fig.1 Block Diagram
●Typical
Application Circuit
C_PC
3300pF
C_SS
0.1
+0.05
μF
R_PC
7.5kΩ
COMP
-
1
R_DW
10kΩ
R_UP
27kΩ
SS
Thermal Pad
(to be shorted to GND)
BST
EN
GND
VIN
SW
FB
VIN 12V
C_VC1
10μF
L
V
OUT
3.3V
10µH
C_CO1
20μF
R_BS
22Ω
C_BS
0.1μF
Maker
※R_BS
protect from VIN-BST short destruction.
Fig.2 Application Circuit
Symbol
Input capacitor
Output capacitor
Inductor
C_VC1
C_CO1
L
TDK
TDK
TDK
Part No
C3225JB1E106K
C3216JB1C106M
SLF10165-100M3R8
10µF/25V
10µF/16V
10µH/3.8A
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BD9329AEFJ
●Block
Operation
・VREG
A block to generate constant-voltage for DC/DC boosting.
・VREF
A block that generates internal reference voltage of 5.1 V (Typ.).
・TSD/UVLO
TSD (Thermal shutdown)/UVLO (Under Voltage Lockout) protection block.
The TSD circuit shuts down IC at high temperature.
The UVLO circuit shuts down the IC when the VCC is Low Voltage.
Technical Note
・Error
amp block (ERR)
This is the circuit to compare the reference voltage and the feedback voltage of output voltage. The COMP pin voltage
resulting from this comparison determines the switching duty. At the time of startup, since the soft start is operated by the
SS pin voltage, the COMP pin voltage is limited to the SS pin voltage.
・Oscillator
block (OSC)
This block generates the oscillating frequency.
・SLOPE
block
This block generates the triangular waveform from the clock created by OSC. Generated triangular waveform is sent to the
PWM comparator.
・PWM
block
The COMP pin voltage output by the error amp is compared to the SLOPE block's triangular waveform to determine the
switching duty. Since the switching duty is limited by the maximum duty ratio which is determined internally, it does not
become 100%.
・DRV
block
A DC/DC driver block. A signal from the PWM is input to drive the power FETs.
・Soft
start circuit
Since the output voltage rises gradually while restricting the current at the time of startup, it is possible to prevent the
output voltage overshoot or the rush current.
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BD9329AEFJ
●Outward
form
4.9±0.1
(Max5.25 include.BURR)
(3.2)
Technical Note
+6°
-4°
6
5
8
7
6.0±0.2
3.9±0.1
(2.4)
0.545
1
2
4
3
1PIN MARK
S
0.17
-0.03
1.0MAX
0.85±0.05
0.08±0.08
1.27
0.08
S
0.42
-0.04
+0.05
0.08
M
Fig.3 HTSOP-J8 Package
(Unit:mm)
●Pin
Assignment and Pin Function
Pin No.
1
2
3
4
5
6
7
8
Pin name
BST
VIN
SW
GND
FB
COMP
EN
SS
Function
High-Side Gate Drive Boost Input
Power Input
Power Switching Output
Ground
Feed Back Input
Compensation Node
Enable Input
Soft Start Control Input
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© 2011 ROHM Co., Ltd. All rights reserved.
0.65±0.15
1.05±0.2
+0.05
+0.05
-0.03
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