INTEGRATED CIRCUITS
DATA SHEET
SAA1305T
On/off logic IC
Product specification
Supersedes data of 1998 Sep 04
2004 Jan 15
Philips Semiconductors
Product specification
On/off logic IC
FEATURES
•
8 accurate Schmitt trigger inputs with clamp circuits
•
Very low quiescent current
•
Reset generator circuit
•
Changed information output
•
On/off output to control a regulator IC which supplies the
microcontroller
•
32.768 kHz RC oscillator and/or a 32.768 kHz crystal
oscillator
•
No delayed reset needed (start-up behaviour oscillator
fixed by internal logic)
•
Watchdog timer function
•
Blinking LED oscillator with drive circuit for LED
•
Watch function.
GENERAL DESCRIPTION
The SAA1305T is an on/off logic IC, intended for use in car
radios to interface between a microcontroller and various
input signals such as ignition, low supply detection, on/off
key and external control signals.
QUICK REFERENCE DATA
SYMBOL
V
DD
I
q
f
SCL(max)
T
vj
PARAMETER
supply voltage
quiescent supply current
maximum SCL clock frequency
virtual junction temperature
CONDITIONS
operating
MIN.
4.5
−
−
SAA1305T
The SAA1305T can replace an existing on/off logic built-up
with discrete components.
The SAA1305T contains 8 inputs with accurate Schmitt
triggers and clamp circuits. The main function of this IC is
an intelligent I/O expander with 2 modes of operation:
1. Normal I/O expander: the microcontroller (master) is
running and the SAA1305T acts like a slave.
2. Sleep mode of the total application: the microcontroller
is stopped and the SAA1305T acts like a master.
During an event, the microcontroller is awakened.
The communication with the IC is performed via the
I
2
C-bus (400 kHz). Extra functions of the SAA1305T are:
•
LED blinker circuit
•
One-day watch
•
Watchdog timer.
TYP.
5.0
130
−
−
MAX.
5.5
200
400
150
UNIT
V
µA
kHz
°C
V
DD
= 5 V; standby mode
−
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
SAA1305T
SO24
DESCRIPTION
plastic small outline package; 24 leads; body width 7.5 mm
VERSION
SOT137-1
2004 Jan 15
2
Philips Semiconductors
Product specification
On/off logic IC
BLOCK DIAGRAM
SAA1305T
handbook, full pagewidth
D0
D1
D2
D3
D4
D5
D6
D7
1
2
3
4
5
6
7
8
STATUS
VL TIMER
WATCH TIMER
ALARM TIMER
WATCHDOG
TIMER
OSCILLATOR
LED DRIVER
22
LED
SUPPLY
10
RES
VDD
21
19
16
17
14
15
ERROR
COUNTER
13
MGR200
COMPARATOR
MASK
RESET
GENERATOR
24
23
9
CHI
RP
ON/OFF
NEW
LATCH
OLD
LATCH
SAA1305T
12
TS
SDA
SCL
18
20
I
2
C-BUS
INTERFACE
11
WD
VSS
XTAL2
XTAL1
OSC2
TST
OSC1
Fig.1 Block diagram.
2004 Jan 15
3
Philips Semiconductors
Product specification
On/off logic IC
PINNING
SYMBOL
D0
D1
D2
D3
D4
D5
D6
D7
ON/OFF
RES
WD
TS
TST
OSC1
OSC2
XTAL1
XTAL2
SDA
V
SS
SCL
V
DD
LED
RP
CHI
Note
1. The following results in a LOW-level voltage on pin CHI:
a) A change on any of the (non-masked) inputs D0 to D7.
b) A device reset.
c) An alarm or V
L
timer event.
d) An oscillator fault or a failed I
2
C-bus read sequence after a change information signal.
e) A failed Watchdog timer trigger sequence.
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
DESCRIPTION
SAA1305T
input D0; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI
input D1; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI
input D2; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI
input D3; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI
input D4; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI
input D5; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI
input D6; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI
input D7; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI
on/off output (off is active LOW); for controlling the enable of a separate power supply IC from the
microcontroller
reset input (active LOW); for power-on or system reset for the IC
Watchdog timer trigger input signal from the microcontroller
timer start input (active LOW); to trigger the V
L
(is an undervoltage) timer (250 ms)
test purpose input; must be connected to V
SS
RC oscillator output (32.768 kHz)
RC oscillator input (32.768 kHz)
crystal oscillator output (32.768 kHz)
crystal oscillator input (32.768 kHz)
I
2
C-bus serial data input/output; interface to the microcontroller
ground supply (0 V)
I
2
C-bus serial clock line input; interface to the microcontroller
supply voltage; 5 V
±10%
with a current consumption of maximum 200
µA
(without LED current)
light emitting diode output; to drive a LED up to 20 mA (high side switch to V
DD
)
reset pulse output
change information output (active LOW); note 1
2004 Jan 15
4
Philips Semiconductors
Product specification
On/off logic IC
Reset time
SAA1305T
handbook, halfpage
D0 1
D1 2
D2 3
D3 4
D4 5
D5 6
24 CHI
23 RP
22 LED
21 VDD
20 SCL
19 VSS
The pulse time on pin RP is selectable via an I
2
C-bus
command; see Table 8. The default value after Power-on
reset is the longest time (20 ms). Selectable pulse times
via the control register are: 1, 5, 10 and 20 ms.
With the rising edge of the reset pulse all inputs, except the
Watchdog timer and V
L
timer, are disabled until the
I
2
C-bus command ENABLE-RESET. Each pulse on
pin RP resets the internal I
2
C-bus interface.
On/off
The output signal on pin ON/OFF remains HIGH after a
trigger event. Trigger sources are:
•
Alterations on any of the inputs D0 to D7
•
An impedance detection
•
A device reset
•
A V
L
(is an undervoltage) timer or alarm timer event
•
An oscillator fault.
In the event of a five time failed Watchdog timer trigger or
missed I
2
C-bus read sequence (after a change information
indication), an internal logic circuit will reset pin ON/OFF
and set the IC in the standby mode. It is also possible to
control pin ON/OFF during the run mode via an I
2
C-bus
command (see Table 8, bit 1). In principal two stable IC
modes are possible; see Fig.3:
1. Standby mode: an oscillator fault and the following IC
function groups can trigger a reset pulse to enter the
run mode;
a) Watch (alarm timer).
b) Supply (device reset).
c) Inputs D0 to D7 (a change on any of these inputs
or an impedance detection).
The Watchdog timer and the V
L
timer are disabled in
the standby mode.
2. Run mode: only the Watchdog timer (WD), an
oscillator fault, a missed I
2
C-bus communication and
the reset input (RES) can trigger a reset pulse. It is
possible to enter the standby mode via control register
bit 0; see Table 8.
The dynamic mode or wait mode is possible but can only
be started from the run mode (see Section “V
L
timer”).
SAA1305T
D6 7
D7 8
ON/OFF 9
RES 10
WD 11
TS 12
MGR201
18 SDA
17 XTAL2
16 XTAL1
15 OSC2
14 OSC1
13 TST
Fig.2 Pin configuration.
FUNCTIONAL DESCRIPTION
Figure 1 shows the block diagram for the SAA1305T.
Details are explained in the subsequent sections.
Watch and alarm functions
An internal RAM (watch register) counts automatically the
seconds for one-day (one-day reset also automatically).
The watch register can be set and read from the I
2
C-bus.
An alarm function is possible via a second RAM (alarm
register) and is programmable via the I
2
C-bus. The alarm
timer triggers pin CHI and if enabled the reset pulse on
pin RP. After a device reset the content of the alarm
register is FFFFH (alarm function is disabled) and the
content of watch register is 0000H.
LED control
The I
2
C-bus interface control (see Table 10) for the LED
contains:
•
Two function control bits
•
Two control bits for the blink LED frequency
•
Two control bits for the blink LED duration time.
All bits are combined within the LED register.
2004 Jan 15
5
DSP 与 ARM 处理器
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