电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

IS61VPS51236A-200TQI-TR

产品描述SRAM 18Mb 512Kx36 Sync SRAM 2.5v
产品类别存储   
文件大小367KB,共35页
制造商ISSI(芯成半导体)
官网地址http://www.issi.com/
下载文档 详细参数 选型对比 全文预览

IS61VPS51236A-200TQI-TR在线购买

供应商 器件名称 价格 最低购买 库存  
IS61VPS51236A-200TQI-TR - - 点击查看 点击购买

IS61VPS51236A-200TQI-TR概述

SRAM 18Mb 512Kx36 Sync SRAM 2.5v

IS61VPS51236A-200TQI-TR规格参数

参数名称属性值
Product AttributeAttribute Value
制造商
Manufacturer
ISSI(芯成半导体)
产品种类
Product Category
SRAM
RoHSN
Memory Size18 Mbit
Organization512 k x 36
Access Time3.1 ns
Maximum Clock Frequency200 MHz
接口类型
Interface Type
Parallel
电源电压-最大
Supply Voltage - Max
2.625 V
电源电压-最小
Supply Voltage - Min
2.375 V
Supply Current - Max475 mA
最小工作温度
Minimum Operating Temperature
- 40 C
最大工作温度
Maximum Operating Temperature
+ 85 C
安装风格
Mounting Style
SMD/SMT
封装 / 箱体
Package / Case
TQFP-100
系列
Packaging
Reel
数据速率
Data Rate
SDR
类型
Type
Synchronous
Number of Ports4
Moisture SensitiveYes
工厂包装数量
Factory Pack Quantity
800
单位重量
Unit Weight
0.023175 oz

文档预览

下载PDF文档
IS61VPS25672A IS61LPS25672A
IS61VPS51236A IS61LPS51236A
IS61VPS102418A IS61LPS102418A
256K x 72, 512K x 36, 1024K x 18
18Mb SYNCHRONOUS PIPELINED,
SINGLE CYCLE DESELECT STATIC RAM
FEATURES
• Internal self-timed write cycle
• Individual Byte Write Control and Global Write
• Clock controlled, registered address, data and
control
• Burst sequence control using MODE input
• Three chip enable option for simple depth
expansion and address pipelining
• Common data inputs and data outputs
• Auto Power-down during deselect
• Single cycle deselect
• Snooze MODE for reduced-power standby
• JTAG Boundary Scan for PBGA package
• Power Supply
LPS: V
DD
3.3V + 5%, V
DDQ
3.3V/2.5V + 5%
VPS: V
DD
2.5V + 5%, V
DDQ
2.5V + 5%
• JEDEC 100-Pin TQFP, 119-ball PBGA, 165-ball
PBGA, and 209-ball (x72) packages
• Lead-free available
MAY 2010
DESCRIPTION
The
ISSI
IS61LPS/VPS51236A, IS61LPS/VPS102418A,
and IS61LPS/VPS25672A are high-speed, low-power syn-
chronous static RAMs designed to provide burstable, high-
performance memory for communication and networking
applications. The IS61LPS/VPS51236A is organized as
524,288 words by 36 bits, the IS61LPS/VPS102418A is
organized as 1,048,576 words by 18 bits, and the IS61LPS/
VPS25672A is organized as 262,144 words by 72 bits.
Fabricated with
ISSI
's advanced CMOS technology, the
device integrates a 2-bit burst counter, high-speed SRAM
core, and high-drive capability outputs into a single mono-
lithic circuit. All synchronous inputs pass through regis-
ters controlled by a positive-edge-triggered single clock
input.
Write cycles are internally self-timed and are initiated by
the rising edge of the clock input. Write cycles can be one
to four bytes wide as controlled by the write control inputs.
Separate byte enables allow individual bytes to be written.
The byte write operation is performed by using the byte
write enable (BWE) input combined with one or more
individual byte write signals (BWx). In addition, Global
Write (GW) is available for writing all bytes at one time,
regardless of the byte write controls.
Bursts can be initiated with either
ADSP
(Address Status
Processor) or
ADSC
(Address Status Cache Controller)
input pins. Subsequent burst addresses can be generated
internally and controlled by the
ADV
(burst address
advance) input pin.
The mode pin is used to select the burst sequence order,
Linear burst is achieved when this pin is tied LOW.
Interleave burst is achieved when this pin is tied HIGH or
left floating.
FAST ACCESS TIME
Symbol
t
KQ
t
KC
Parameter
Clock Access Time
Cycle Time
Frequency
250
2.6
4
250
200
3.1
5
200
Units
ns
ns
MHz
Copyright © 2010 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. N
02/12/2010
1

IS61VPS51236A-200TQI-TR相似产品对比

IS61VPS51236A-200TQI-TR IS61LPS25672A-250B1-TR IS61LPS51236A-250B3-TR IS61LPS51236A-200TQI-TR IS61LPS51236A-200TQI IS61LPS51236A-250B3 IS61LPS102418A-200TQ IS61VPS51236A-250B3
描述 SRAM 18Mb 512Kx36 Sync SRAM 2.5v SRAM 18Mb 256Kx72 250MHz Sync SRAM 3.3v SRAM 18Mb 512Kx36 250MHz Sync SRAM 3.3v SRAM 18Mb 512Kx36 200MHz Sync SRAM 3.3v SRAM 18Mb 512Kx36 200MHz Sync SRAM 3.3v SRAM 18Mb 512Kx36 250MHz Sync SRAM 3.3v SRAM 18Mb 1Mbx18 200MHz Sync SRAM 3.3v SRAM 18Mb 512Kx36 Sync SRAM 2.5v
Product Attribute Attribute Value Attribute Value Attribute Value Attribute Value Attribute Value - Attribute Value -
制造商
Manufacturer
ISSI(芯成半导体) ISSI(芯成半导体) ISSI(芯成半导体) ISSI(芯成半导体) ISSI(芯成半导体) - ISSI(芯成半导体) -
产品种类
Product Category
SRAM SRAM SRAM SRAM SRAM - SRAM -
RoHS N N N N N - N -
Memory Size 18 Mbit 18 Mbit 18 Mbit 18 Mbit 18 Mbit - 18 Mbit -
Organization 512 k x 36 256 k x 72 512 k x 36 512 k x 36 512 k x 36 - 1 M x 18 -
Access Time 3.1 ns 2.6 ns 2.6 ns 3.1 ns 3.1 ns - 3.1 ns -
Maximum Clock Frequency 200 MHz 250 MHz 250 MHz 200 MHz 200 MHz - 200 MHz -
接口类型
Interface Type
Parallel Parallel Parallel Parallel Parallel - Parallel -
电源电压-最大
Supply Voltage - Max
2.625 V 3.465 V 3.465 V 3.465 V 3.465 V - 3.465 V -
电源电压-最小
Supply Voltage - Min
2.375 V 3.135 V 3.135 V 3.135 V 3.135 V - 3.135 V -
Supply Current - Max 475 mA 600 mA 450 mA 475 mA 475 mA - 425 mA -
最小工作温度
Minimum Operating Temperature
- 40 C 0 C 0 C - 40 C - 40 C - 0 C -
最大工作温度
Maximum Operating Temperature
+ 85 C + 70 C + 70 C + 85 C + 85 C - + 70 C -
安装风格
Mounting Style
SMD/SMT SMD/SMT SMD/SMT SMD/SMT SMD/SMT - SMD/SMT -
封装 / 箱体
Package / Case
TQFP-100 PBGA-209 FBGA-165 TQFP-100 TQFP-100 - TQFP-100 -
系列
Packaging
Reel Reel Reel Reel Tube - Tube -
数据速率
Data Rate
SDR SDR SDR SDR SDR - SDR -
类型
Type
Synchronous Synchronous Synchronous Synchronous Synchronous - Synchronous -
Number of Ports 4 8 4 4 4 - 2 -
Moisture Sensitive Yes Yes Yes Yes Yes - Yes -
工厂包装数量
Factory Pack Quantity
800 1000 2000 800 72 - 72 -
我想学嵌入式.....
我会编程语言c++,asp,java 现在想学嵌入式.. 找了一些资料还是有点迷茫.. 望各位达人指点一下... 非常感谢......
eddy326 嵌入式系统
关于#define和sbit的区别
#defined P01=P0^1; sbit P01=P0^1; 请问下这2个有却别吗?用以来像执行P01=0;P01=1;感觉一样 ...
5532 嵌入式系统
使用增益天线时设备会增加耗电量吗?
新手刚入门无线,老是听人们说用一根3dB增益天线覆盖面积基本能扩大一倍,但是这会使设备增加耗电量吗?...
daweittj 无线连接
C67系列的EMIFA传输速度问题
我使用OMAPL137的是EMIFA与FPGA通信,测试发现两次通信间隔很大,用FPGA抓取信号可知两次cs下降沿时间超过了300us。。。使用的是while(1)一直读取一个地址看到的结果。求大神帮忙解决一下呢?...
郁海难填 DSP 与 ARM 处理器
晕!是悲哀?还是庆幸?33%大学生呈现双性化性别特征
  当代大学生性别角色悄然变化   近年来,“超女”、“加油,好男儿”等娱乐节目在青少年中间产生了很大的影响。一时间,中性打扮的“超女们”成了众多女孩追逐与效仿的对象,而有点女子 ......
绿茶 聊聊、笑笑、闹闹
bootloader?内存?
写了一个bootloader,已可以稳定运行,现在换了一块不同的RAM芯片,修改bootloader中对应参数后,不能工作; 跟进后发现访问内存时出错,即在loader程序和应用程序拷贝到内存时都会挂掉,各位 ......
tigerlikes 嵌入式系统

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 1733  752  1561  384  2217  23  19  49  32  28 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved