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IS61LPS25672A-250B1-TR

产品描述SRAM 18Mb 256Kx72 250MHz Sync SRAM 3.3v
产品类别存储   
文件大小367KB,共35页
制造商ISSI(芯成半导体)
官网地址http://www.issi.com/
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IS61LPS25672A-250B1-TR概述

SRAM 18Mb 256Kx72 250MHz Sync SRAM 3.3v

IS61LPS25672A-250B1-TR规格参数

参数名称属性值
Product AttributeAttribute Value
制造商
Manufacturer
ISSI(芯成半导体)
产品种类
Product Category
SRAM
RoHSN
Memory Size18 Mbit
Organization256 k x 72
Access Time2.6 ns
Maximum Clock Frequency250 MHz
接口类型
Interface Type
Parallel
电源电压-最大
Supply Voltage - Max
3.465 V
电源电压-最小
Supply Voltage - Min
3.135 V
Supply Current - Max600 mA
最小工作温度
Minimum Operating Temperature
0 C
最大工作温度
Maximum Operating Temperature
+ 70 C
安装风格
Mounting Style
SMD/SMT
封装 / 箱体
Package / Case
PBGA-209
系列
Packaging
Reel
数据速率
Data Rate
SDR
类型
Type
Synchronous
Number of Ports8
Moisture SensitiveYes
NumOfPackaging1
工厂包装数量
Factory Pack Quantity
1000

文档预览

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IS61VPS25672A IS61LPS25672A
IS61VPS51236A IS61LPS51236A
IS61VPS102418A IS61LPS102418A
256K x 72, 512K x 36, 1024K x 18
18Mb SYNCHRONOUS PIPELINED,
SINGLE CYCLE DESELECT STATIC RAM
FEATURES
• Internal self-timed write cycle
• Individual Byte Write Control and Global Write
• Clock controlled, registered address, data and
control
• Burst sequence control using MODE input
• Three chip enable option for simple depth
expansion and address pipelining
• Common data inputs and data outputs
• Auto Power-down during deselect
• Single cycle deselect
• Snooze MODE for reduced-power standby
• JTAG Boundary Scan for PBGA package
• Power Supply
LPS: V
DD
3.3V + 5%, V
DDQ
3.3V/2.5V + 5%
VPS: V
DD
2.5V + 5%, V
DDQ
2.5V + 5%
• JEDEC 100-Pin TQFP, 119-ball PBGA, 165-ball
PBGA, and 209-ball (x72) packages
• Lead-free available
MAY 2010
DESCRIPTION
The
ISSI
IS61LPS/VPS51236A, IS61LPS/VPS102418A,
and IS61LPS/VPS25672A are high-speed, low-power syn-
chronous static RAMs designed to provide burstable, high-
performance memory for communication and networking
applications. The IS61LPS/VPS51236A is organized as
524,288 words by 36 bits, the IS61LPS/VPS102418A is
organized as 1,048,576 words by 18 bits, and the IS61LPS/
VPS25672A is organized as 262,144 words by 72 bits.
Fabricated with
ISSI
's advanced CMOS technology, the
device integrates a 2-bit burst counter, high-speed SRAM
core, and high-drive capability outputs into a single mono-
lithic circuit. All synchronous inputs pass through regis-
ters controlled by a positive-edge-triggered single clock
input.
Write cycles are internally self-timed and are initiated by
the rising edge of the clock input. Write cycles can be one
to four bytes wide as controlled by the write control inputs.
Separate byte enables allow individual bytes to be written.
The byte write operation is performed by using the byte
write enable (BWE) input combined with one or more
individual byte write signals (BWx). In addition, Global
Write (GW) is available for writing all bytes at one time,
regardless of the byte write controls.
Bursts can be initiated with either
ADSP
(Address Status
Processor) or
ADSC
(Address Status Cache Controller)
input pins. Subsequent burst addresses can be generated
internally and controlled by the
ADV
(burst address
advance) input pin.
The mode pin is used to select the burst sequence order,
Linear burst is achieved when this pin is tied LOW.
Interleave burst is achieved when this pin is tied HIGH or
left floating.
FAST ACCESS TIME
Symbol
t
KQ
t
KC
Parameter
Clock Access Time
Cycle Time
Frequency
250
2.6
4
250
200
3.1
5
200
Units
ns
ns
MHz
Copyright © 2010 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. N
02/12/2010
1

IS61LPS25672A-250B1-TR相似产品对比

IS61LPS25672A-250B1-TR IS61LPS51236A-250B3-TR IS61VPS51236A-200TQI-TR IS61LPS51236A-200TQI-TR IS61LPS51236A-200TQI IS61LPS51236A-250B3 IS61LPS102418A-200TQ IS61VPS51236A-250B3
描述 SRAM 18Mb 256Kx72 250MHz Sync SRAM 3.3v SRAM 18Mb 512Kx36 250MHz Sync SRAM 3.3v SRAM 18Mb 512Kx36 Sync SRAM 2.5v SRAM 18Mb 512Kx36 200MHz Sync SRAM 3.3v SRAM 18Mb 512Kx36 200MHz Sync SRAM 3.3v SRAM 18Mb 512Kx36 250MHz Sync SRAM 3.3v SRAM 18Mb 1Mbx18 200MHz Sync SRAM 3.3v SRAM 18Mb 512Kx36 Sync SRAM 2.5v
Product Attribute Attribute Value Attribute Value Attribute Value Attribute Value Attribute Value - Attribute Value -
制造商
Manufacturer
ISSI(芯成半导体) ISSI(芯成半导体) ISSI(芯成半导体) ISSI(芯成半导体) ISSI(芯成半导体) - ISSI(芯成半导体) -
产品种类
Product Category
SRAM SRAM SRAM SRAM SRAM - SRAM -
RoHS N N N N N - N -
Memory Size 18 Mbit 18 Mbit 18 Mbit 18 Mbit 18 Mbit - 18 Mbit -
Organization 256 k x 72 512 k x 36 512 k x 36 512 k x 36 512 k x 36 - 1 M x 18 -
Access Time 2.6 ns 2.6 ns 3.1 ns 3.1 ns 3.1 ns - 3.1 ns -
Maximum Clock Frequency 250 MHz 250 MHz 200 MHz 200 MHz 200 MHz - 200 MHz -
接口类型
Interface Type
Parallel Parallel Parallel Parallel Parallel - Parallel -
电源电压-最大
Supply Voltage - Max
3.465 V 3.465 V 2.625 V 3.465 V 3.465 V - 3.465 V -
电源电压-最小
Supply Voltage - Min
3.135 V 3.135 V 2.375 V 3.135 V 3.135 V - 3.135 V -
Supply Current - Max 600 mA 450 mA 475 mA 475 mA 475 mA - 425 mA -
最小工作温度
Minimum Operating Temperature
0 C 0 C - 40 C - 40 C - 40 C - 0 C -
最大工作温度
Maximum Operating Temperature
+ 70 C + 70 C + 85 C + 85 C + 85 C - + 70 C -
安装风格
Mounting Style
SMD/SMT SMD/SMT SMD/SMT SMD/SMT SMD/SMT - SMD/SMT -
封装 / 箱体
Package / Case
PBGA-209 FBGA-165 TQFP-100 TQFP-100 TQFP-100 - TQFP-100 -
系列
Packaging
Reel Reel Reel Reel Tube - Tube -
数据速率
Data Rate
SDR SDR SDR SDR SDR - SDR -
类型
Type
Synchronous Synchronous Synchronous Synchronous Synchronous - Synchronous -
Number of Ports 8 4 4 4 4 - 2 -
Moisture Sensitive Yes Yes Yes Yes Yes - Yes -
工厂包装数量
Factory Pack Quantity
1000 2000 800 800 72 - 72 -
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