CHL8326/8
DIGITAL MULTI-PHASE GPU BUCK CONTROLLER
PRODUCT BRIEF
PRELIMINARY
FEATURES
6-phase & 8-phase dual output PWM Controller
Phases are flexibly assigned between Loops 1 & 2
Intel® VR12, AMD® SVI/PVI/G34 & Memory modes
Overclocking & Gaming Mode with Vmax setting
Switching frequency from 200kHz to 1.2MHz per phase
CHiL Efficiency Shaping Features including Variable
Gate Drive, Dynamic Phase Control
Programmable 1-phase or 2-phase for Light Loads and
Active Diode Emulation for Very Light Loads
CHiL Adaptive Transient Algorithm (ATA) on both loops
minimizes output bulk capacitors and system cost
Designed for use with coupled inductors
Auto-Phase Detection with auto-compensation
Per-Loop Fault Protection: OVP, UVP, OCP, OTP, CFP
I2C/SMBus/PMBus system interface for telemetry of
Temperature, Voltage, Current & Power for both loops
Non-Volatile Memory (NVM) for custom configuration
Compatible with CHiL ATL and 3.3V tri-state Drivers
+3.3V supply voltage; 0ºC to 85ºC ambient operation
Pb-Free, RoHS, 7x7 48 pin & 8x8 56 pin QFN packages
temperature sensing with VRHOT signal.
The CHL8326/8 also includes numerous features like
register diagnostics for fast design cycles and platform
differentiation, truly simplifying VRD design and enabling
fastest time-to-market with its “set-and-forget” methodology.
ISEN1
ISEN2
ISEN3
ISEN4
ISEN5
48
RCSP
RCSM
VCC
CFP
1
/
VFIXEN_PSI
2
VSEN
VRTN
RRES
TSEN
V18A
VR_READY /
PWRGD
2
VR_READY_L2
1
2
/ PWROK
VINSEN
1
47
46
45
44
43
42
41
40
39
38
37
36
RCSP_L2
35
RCSM_L2
34
VCC
33
VSEN_L2
32
VRTN_L2
1
2
3
4
5
6
7
8
9
10
11
49
GND
12
13
14
15
2
CHL8326
48 Pin 7x7 QFN
Top View
ISEN6
31
PWM6
30
PWM5
29
PWM4
28
PWM3
27
PWM2
26
PWM1
25
VAR_GATE
24
IRTN1
IRTN2
IRTN3
IRTN4
IRTN5
16
2
17
2
18
19
20
21
22
23
VR_HOT#
1
/
VRHOT_ICRIT#
2
GPO_B_PSI
1
/
VID[5]
2
SMB_DIO
IRTN6
SV_ADDR_GPO_D
/ VID[1]
2
1
1
SV_CLK / SVC_VID[3]
ISEN1
ISEN2
SV_DIO / SVDVID[2]
ISEN3
ISEN4
ISEN5
IRTN8
ISEN6
44
IRTN1
IRTN2
IRTN3
IRTN4
IRTN5
IRTN6
PM_ADDR_GPO_C /
PM_ADDRVID[0]
2
GPO_A
1
/ CBOUT
2
SV_ALERT / VID[4]
1
SMB_ALERT#
1
SMB_CLK
1
ENABLE
DESCRIPTION
The CHL8326/8 are dual-loop digital multi-phase buck
controllers. The CHL8326 drives up to 6 phases and the
CHL8328 drives up to 8 phases. The CHL8326/8 is fully
Intel® VR12 and AMD® SVI/PVI compliant on both loops
and provides a Vtt tracking function for DDR memory.
NVM storage saves pins and enables a small package size.
The CHL8326/8 includes the CHiL Efficiency Shaping
Technology to deliver exceptional efficiency at minimum
cost across the entire load range. CHiL Variable Gate Drive
optimizes the MOSFET gate drive voltage based on real-
time load current. CHiL Dynamic Phase Control adds/drops
phases based upon load current. The CHL8326/8 can be
configured to enter 1-phase operation and active diode
emulation mode automatically or by command.
CHiL’s unique Adaptive Transient Algorithm (ATA), based
on proprietary non-linear digital PWM algorithms, minimizes
output bulk capacitors. In addition, a coupled inductor mode,
with phases added/dropped in pairs, enables further
improvement in transient response and form factor.
The I2C/PMBus interface can communicate with up to 16
CHL8326/8 based VR loops. Device configuration and fault
parameters are easily defined using the CHiL Intuitive
Power Designer (IPD) GUI and stored in on-chip NVM.
The CHL8326/8 provides extensive OVP, UVP, OCP and
OTP fault protection and includes thermistor based
Trademarks and registered trademarks are the property of the respective
owners.
ISEN8
RCSP
RCSM
VCC
CFP
1
/
VFIXEN_PSI
2
VSEN
VRTN
RRES
TSEN
V18A
VR_READY
1
/
PWRGD
2
VR_READY_L2
1
/ PWROK
2
GPO_B
VINSEN
1
2
3
4
5
6
7
8
9
10
11
12
13
56
55
54
53
52
51
50
49
48
47
46
45
43
42
41
40
39
38
37
ISEN7
RCSP_L2
RCSM_L2
VCC
VSEN_L2
VRTN_L2
PWM8
PWM7
PWM6
PWM5
PWM4
PWM3
PWM2
PWM1
CHL8328
56 Pin 8x8 QFN
Top View
IRTN7
36
35
34
33
32
31
30
29
28
57 GND
14
15
16
2
17
2
18
19
20
21
22
23
24
25
26
27
VR_HOT#
1
/
VRHOT_ICRIT#
2
SMB_DIO
TSEN2
SV_CLK
1
/ SVC_VID[3]
2
SV_DIO
1
/ SVDVID[2]
2
1
2
Intel/MPoL mode
AMD mode
Figure 1: CHL8326 & CHL8328 Packages
APPLICATIONS
Intel® VR12 & AMD® SVI & PVI based systems
DDR Memory with Vtt tracking
Overclocked & Gaming platforms
One Highwood Drive, Tewksbury, MA 01876
Tel: +1(978)-640-0011
www.chilsemi.com
© 2010 CHiL Semiconductor Corp. All rights reserved
PB0011 Rev. 0.05, June 10, 2010
Page 1 of 2
PM_ADDR_GPO_C /
PM_ADDR_VID[0]
2
GPO_A
1
/ CBOUT
2
PSI(MPoL) / VID[5]
SV_ALERT / VID[4]
SV_ADDR_GPO_D
/ VID[1]
2
SMB_ALERT#
VAR_GATE
SMB_CLK
ENABLE
1
1
1
1
模拟电子
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
