74AC125, 74ACT125 — Quad Buffer with 3-STATE Outputs
January 2008
74AC125, 74ACT125
Quad Buffer with 3-STATE Outputs
Features
■
I
CC
reduced by 50%
■
Outputs source/sink 24mA
■
ACT125 has TTL-compatible outputs
General Description
The AC/ACT125 contains four independent non-inverting
buffers with 3-STATE outputs.
Ordering Information
Order
Number
74AC125SC
74AC125SJ
74AC125MTC
74AC125PC
74ACT125SC
74ACT125SJ
74ACT125MTC
74ACT125PC
Package
Number
M14A
M14D
MTC14
N14A
M14A
M14D
MTC14
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Connection Diagram
Logic Symbol
IEEE/IEC
Pin Description
Pin Names
A
n
, B
n
O
n
Description
Inputs
Outputs
Function Table
Inputs
A
n
L
L
H
B
n
L
H
X
Output
O
n
L
H
Z
H
=
HIGH Voltage Level, L
=
LOW Voltage Level
Z
=
HIGH Impedance, X
=
Immaterial
©1988 Fairchild Semiconductor Corporation
74AC125, 74ACT125 Rev. 1.4.1
www.fairchildsemi.com
74AC125, 74ACT125 — Quad Buffer with 3-STATE Outputs
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
V
CC
I
IK
Supply Voltage
DC Input Diode Current
V
I
=
–0.5V
V
I
=
V
CC
+ 0.5
V
I
I
OK
DC Input Voltage
DC Output Diode Current
V
O
=
–0.5V
V
O
=
V
CC
+ 0.5V
V
O
I
O
DC Output Voltage
Parameter
Rating
–0.5V to +7.0V
–20mA
+20mA
–0.5V to V
CC
+ 0.5V
–20mA
+20mA
–0.5V to V
CC
+ 0.5V
±50mA
±50mA
–65°C to +150°C
140°C
DC Output Source or Sink Current
I
CC
or I
GND
DC V
CC
or Ground Current per Output Pin
T
STG
Storage Temperature
T
J
Junction Temperature
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
V
CC
Supply Voltage
AC
ACT
V
I
V
O
T
A
∆
V /
∆
t
∆
V /
∆
t
Input Voltage
Output Voltage
Operating Temperature
Parameter
Rating
2.0V to 6.0V
4.5V to 5.5V
0V to V
CC
0V to V
CC
–40°C to +85°C
125mV/ns
125mV/ns
Minimum Input Edge Rate, AC Devices:
V
IN
from 30% to 70% of V
CC
, V
CC
@ 3.3V, 4.5V, 5.5V
Minimum Input Edge Rate, ACT Devices:
V
IN
from 0.8V to 2.0V, V
CC
@ 4.5V, 5.5V
©1988 Fairchild Semiconductor Corporation
74AC125, 74ACT125 Rev. 1.4.1
www.fairchildsemi.com
2
74AC125, 74ACT125 — Quad Buffer with 3-STATE Outputs
DC Electrical Characteristics for AC
Symbol
V
IH
Parameter
Minimum HIGH Level
Input Voltage
V
CC
(V)
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
T
A
=
+25°C
Conditions
V
OUT
=
0.1V or
V
CC
– 0.1V
V
OUT
=
0.1V or
V
CC
– 0.1V
I
OUT
=
–50µA
T
A
=
–40°C to +85°C
Guaranteed Limits
Units
V
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.46
3.76
4.76
0.1
0.1
0.1
0.44
0.44
0.44
±1.0
±2.5
µA
µA
V
V
V
Typ.
1.5
2.25
2.75
1.5
2.25
2.75
2.99
4.49
5.49
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.56
3.86
4.86
0.002
0.001
0.001
0.1
0.1
0.1
0.36
0.36
0.36
±0.1
V
IL
Maximum LOW Level
Input Voltage
V
OH
Minimum HIGH Level
Output Voltage
V
IN
=
V
IL
or V
IH
,
I
OH
=
–12mA
V
IN
=
V
IL
or V
IH
,
I
OH
=
–24mA
V
IN
=
V
IL
or V
IH
,
I
OH
=
–24mA
(1)
I
OUT
=
50µA
V
OL
Maximum LOW Level
Output Voltage
3.0
4.5
5.5
3.0
4.5
5.5
V
IN
=
V
IL
or V
IH
,
I
OL
=
12mA
V
IN
=
V
IL
or V
IH
,
I
OL
=
24mA
V
IN
=
V
IL
or V
IH
,
I
OL
=
24mA
(1)
V
I
=
V
CC
, GND
V
I
(OE)
=
V
IL
, V
IH
,
V
I
=
V
CC
, V
GND
,
V
O
=
V
CC
, GND
V
OLD
=
1.65V Max.
V
OHD
=
3.85V Min.
V
IN
=
V
CC
or GND
I
IN(3)
I
OZ
Maximum Input
Leakage Current
Maximum 3-STATE
Current
Minimum Dynamic
Output Current
(2)
Maximum Quiescent
Supply Current
5.5
5.5
±0.25
I
OLD
I
OHD
I
CC(3)
5.5
5.5
5.5
75
–75
4.0
40.0
mA
mA
µA
Notes:
1. All outputs loaded; thresholds on input associated with output under test.
2. Maximum test duration 2.0ms, one output loaded at a time.
3. I
IN
and I
CC
@ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V V
CC
.
©1988 Fairchild Semiconductor Corporation
74AC125, 74ACT125 Rev. 1.4.1
www.fairchildsemi.com
3
74AC125, 74ACT125 — Quad Buffer with 3-STATE Outputs
DC Electrical Characteristics for ACT
Symbol
V
IH
V
IL
V
OH
Parameter
Minimum HIGH Level
Input Voltage
Maximum LOW Level
Input Voltage
Minimum HIGH Level
Output Voltage
V
CC
(V)
4.5
5.5
4.5
5.5
4.5
5.5
4.5
5.5
T
A
=
+25°C
Conditions
V
OUT
=
0.1V or
V
CC
– 0.1V
V
OUT
=
0.1V or
V
CC
– 0.1V
I
OUT
=
–50µA
V
IN
=
V
IL
or V
IH
,
I
OH
=
–24mA
V
IN
=
V
IL
or V
IH
,
I
OH
=
–24mA
(4)
I
OUT
=
50µA
V
IN
=
V
IL
or V
IH
,
I
OL
=
24mA
V
IN
=
V
IL
or V
IH
,
I
OL
=
24mA
(4)
±0.1
±0.5
0.6
V
I
=
V
CC
, GND
V
I
=
V
IL
, V
IH
;
V
O
=
V
CC
, GND
V
I
=
V
CC
– 2.1V
(6)
V
OLD
=
1.65V Max.
V
OHD
=
3.85V Min.
V
IN
=
V
CC
or GND
4.0
0.001
0.001
4.86
0.1
0.1
0.36
0.36
T
A
=
–40°C to +85°C
Guaranteed Limits
Units
V
V
V
2.0
2.0
0.8
0.8
4.4
5.4
3.76
4.76
0.1
0.1
0.44
0.44
±1.0
±5.0
1.5
75
–75
40.0
µA
µA
mA
mA
mA
µA
V
Typ.
1.5
1.5
1.5
1.5
4.49
5.49
2.0
2.0
0.8
0.8
4.4
5.4
3.86
V
OL
Maximum LOW Level
Output Voltage
4.5
5.5
4.5
5.5
I
IN
I
OZ
I
CCT
I
OLD
I
OHD
I
CC
Maximum Input
Leakage Current
Maximum 3-STATE
Current
Maximum I
CC
/Input
Minimum Dynamic
Output Current
(5)
Maximum Quiescent
Supply Current
5.5
5.5
5.5
5.5
5.5
5.5
Notes:
4. All outputs loaded; thresholds on input associated with output under test.
5. Maximum test duration 2.0ms, one output loaded at a time.
6. May be measured per the JEDEC Alternate Method.
©1988 Fairchild Semiconductor Corporation
74AC125, 74ACT125 Rev. 1.4.1
www.fairchildsemi.com
4
74AC125, 74ACT125 — Quad Buffer with 3-STATE Outputs
AC Electrical Characteristics for AC
T
A
=
+25°C,
C
L
=
50pF
Symbol
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
T
A
=
–40°C to +85°C,
C
L
=
50pF
Min.
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Parameter
Propagation Delay,
Data to Output
Propagation Delay,
Data to Output
Output Enable Time
Output Enable Time
Output Disable Time
Output Disable Time
V
CC
(V)
(7)
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
Min.
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Typ.
6.5
5.5
6.5
5.0
6.0
5.0
7.5
5.5
7.5
6.5
7.5
6.5
Max.
9.0
7.0
9.0
7.0
10.5
7.0
10.0
8.0
10.0
9.0
10.5
9.0
Max.
10.0
7.5
10.0
7.5
11.0
8.0
11.0
8.5
10.5
9.5
11.5
9.5
Units
ns
ns
ns
ns
ns
ns
Note:
7. Voltage range 3.3 is 3.3V ± 0.3V. Voltage range 5.0 is 5.0V ± 0.5V.
AC Electrical Characteristics for ACT
T
A
=
+25°C,
C
L
=
50pF
Symbol
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
T
A
=
–40°C to +85°C,
C
L
=
50pF
Min.
1.0
1.0
1.0
1.0
1.0
1.0
Parameter
Propagation Delay,
Data to Output
Propagation Delay,
Data to Output
Output Enable Time
Output Enable Time
Output Disable Time
Output Disable Time
V
CC
(V)
(8)
5.0
5.0
5.0
5.0
5.0
5.0
Min.
1.0
1.0
1.0
1.0
1.0
1.0
Typ.
6.5
7.0
6.0
7.0
7.0
7.5
Max.
9.0
9.0
8.5
9.5
9.5
10.0
Max.
10.0
10.0
9.5
10.5
10.5
10.5
Units
ns
ns
ns
ns
ns
ns
Note:
8. Voltage Range 5.0 is 5.0V ± 0.5V.
Capacitance
Symbol
C
IN
C
PD
Parameter
Input Capacitance
Power Dissipation Capacitance
Conditions
V
CC
=
OPEN
V
CC
=
5.0V
Typ.
4.5
45.0
Units
pF
pF
©1988 Fairchild Semiconductor Corporation
74AC125, 74ACT125 Rev. 1.4.1
www.fairchildsemi.com
5
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