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RV5C387A

产品描述I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC WITH VOLTAGE MONITORING FUNCTION
文件大小319KB,共49页
制造商Ricoh Company Ltd.
官网地址http://www.ricoh.com/
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RV5C387A概述

I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC WITH VOLTAGE MONITORING FUNCTION

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I
2
C bus SERIAL INTERFACE REAL-TIME CLOCK IC
WITH VOLTAGE MONITORING FUNCTION
RV5C387A
OUTLINE
NO.EA-080-0208
The RV5C387A is a CMOS real-time clock IC connected to the CPU by two signal, SCL and SDA, and configured to
perform serial transmission of time and calendar data to the CPU. The periodic interrupt circuit is configured to
generate interrupt signals with six selectable interrupts ranging from 0.5 seconds to 1 month. The 2 alarm circuits
generate interrupt signals at preset times. The oscillation circuit is driven under constant voltage so that fluctuations
in oscillation frequency due to voltage are small and supply current is also small (TYP. 0.35µA for the RV5C387A at
3 volts). The oscillation halt sensing circuit can be used to judge the validity of internal data in such events as
power-on. The supply voltage monitoring circuit is configured to record a drop in supply voltage below two
selectable supply voltage monitoring threshold settings. The 32-kHz clock output function (Nch. open drain) is
intended to output sub-clock pulses for the external microcomputer. The oscillation adjustment circuit is intended
to adjust time counts with high precision by correcting deviations in the oscillation frequency of the crystal
oscillator. The 32-kHz clock circuit can be disabled by certain register settings. This model comes in an ultra-
compact 10-pin SSOP-G (with a height of 1.20mm and a pin pitch of 0.5mm).
FEATURES
• Timekeeping supply voltage ranging from 1.45 to 5.5 volts
• Low supply current: TYP. 0.35µA (MAX. 0.8µA) at 3 volts
• Only two signal lines (SCL, SDA) required for connection to the CPU.
(I
2
C bus compatible, 400kHz at V
DD
≥2.5V,
address 7bits)
• Time counters (counting hours, minutes, and seconds) and calendar counters (counting years, months, days,
and weeks) (in BCD format)
• 1900/2000 identification bit for Year 2000 compliance
• Interrupt circuit configured to generate interrupt signals (with interrupts ranging from 0.5 seconds to 1 month)
to the CPU and provided with an interrupt flag and an interrupt halt circuit
• 2 alarm circuits (Alarm_W for week, hour, and minute alarm settings and Alarm_D for hour and minute
alarm settings)
• 32-kHz clock circuit (Nch. open drain output)
• Oscillation halt sensing circuit which can be used to judge the validity of internal data
• Supply voltage monitoring circuit with two supply voltage monitoring threshold settings
• Automatic identification of leap years up to the year 2099
• Selectable 12-hour and 24-hour mode settings
• High precision oscillation adjustment circuit
• Built-in oscillation stabilization capacitors (C
G
and C
D
)
• CMOS process
• Ultra-compact 10-pin SSOP-G(with a height of 1.20mm and size 4.0mm
×
2.9mm)
1

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