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74LVC2244A
Octal buffer/line driver; 30
series termination; 5 V tolerant
input/output; 3-state
Rev. 5 — 3 November 2011
Product data sheet
1. General description
The 74LVC2244A is an octal non-inverting buffer/line driver with 3-state outputs. The
3-state outputs are controlled by the output enable input pins 1OE and 2OE. A HIGH on
pin nOE causes the outputs to assume a high-impedance OFF-state. Schmitt trigger
action at all inputs makes the circuit highly tolerant for slower input rise and fall times. The
device is designed with 30
series termination resistors in both HIGH and LOW output
stages to reduce line noise.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be
applied to the outputs. These features allow the use of these devices as translators in
mixed 3.3 V and 5 V applications.
2. Features and benefits
5 V tolerant inputs/outputs, for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low-power consumption
Direct interface with TTL levels
Integrated 30
termination resistors
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Specified from
40 C
to +85
C
and
40 C
to +125
C
NXP Semiconductors
74LVC2244A
Octal buffer/line driver; 30
series termination; 3-state
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
74LVC2244AD
74LVC2244ADB
74LVC2244APW
74LVC2244ABQ
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
Name
SO20
SSOP20
TSSOP20
Description
plastic small outline package; 20 leads;
body width 7.5 mm
plastic shrink small outline package; 20 leads;
body width 5.3 mm
plastic thin shrink small outline package; 20 leads;
body width 4.4 mm
Version
SOT163-1
SOT339-1
SOT360-1
SOT764-1
Type number
DHVQFN20 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads; 20 terminals;
body 2.5
4.5
0.85 mm
4. Functional diagram
2
1A0
1Y0
18
4
1A1
1Y1
16
6
1A2
1Y2
14
1
EN
18
16
14
12
8
1
1A3
1OE
1Y3
12
2
4
6
8
17
2A0
2Y0
3
15
19
EN
9
7
5
3
mna169
2A1
2Y1
5
13
2A2
2Y2
7
11
13
15
17
11
19
2A3
2OE
2Y3
9
mna170
Fig 1.
IEC logic symbol
Fig 2.
Logic diagram
74LVC2244A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 5 — 3 November 2011
2 of 17
NXP Semiconductors
74LVC2244A
Octal buffer/line driver; 30
series termination; 3-state
5. Pinning information
5.1 Pinning
74LVC2244A
1OE
2
3
4
5
6
7
8
9
GND 10
2A3 11
GND
(1)
1
1A0
2Y0
terminal 1
index area
20 V
CC
19
2OE
18
1Y0
17
2A0
16
1Y1
15
2A1
14
1Y2
13
2A2
12
1Y3
74LVC2244A
1OE
1A0
2Y0
1A1
2Y1
1A2
2Y2
1A3
2Y3
1
2
3
4
5
6
7
8
9
20 V
CC
19 2OE
18 1Y0
17 2A0
16 1Y1
15 2A1
14 1Y2
13 2A2
12 1Y3
11 2A3
001aad084
1A1
2Y1
1A2
2Y2
1A3
2Y3
GND 10
001aad085
Transparent top view
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 3.
Pin configuration SO20 and (T)SSOP20
Fig 4.
Pin configuration DHVQFN20
5.2 Pin description
Table 2.
Symbol
1OE
2OE
1A[0:3]
2A[0:3]
1Y[0:3]
2Y[0:3]
GND
V
CC
Pin description
Pin
1
19
2, 4, 6, 8
17, 15, 13, 11
18, 16, 14, 12
3, 5, 7, 9
10
20
Description
output enable input (active LOW)
output enable input (active LOW)
data input
data input
data output
data output
ground (0 V)
supply voltage
74LVC2244A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 5 — 3 November 2011
3 of 17
NXP Semiconductors
74LVC2244A
Octal buffer/line driver; 30
series termination; 3-state
6. Functional description
Table 3.
Input
nOE
L
L
H
[1]
H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high-impedance OFF-state
Functional table
[1]
Output
nAn
L
H
X
nYn
L
H
Z
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
V
I
I
OK
V
O
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
[3]
Parameter
supply voltage
input clamping current
input voltage
output clamping current
output voltage
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
V
I
< 0 V
[1]
Min
0.5
50
0.5
-
[2]
[2]
Max
+6.5
-
+6.5
50
V
CC
+ 0.5
+6.5
50
100
-
+150
500
Unit
V
mA
V
mA
V
V
mA
mA
mA
C
mW
V
O
> V
CC
or V
O
< 0 V
output HIGH or LOW state
output 3-state
V
O
= 0 V to V
CC
0.5
0.5
-
-
100
65
T
amb
=
40 C
to +125
C
[3]
-
The minimum input voltage ratings may be exceeded if the input current ratings are observed.
The output voltage ratings may be exceeded if the output current ratings are observed.
For SO20 packages: above 70
C
derate linearly with 8 mW/K.
For (T)SSOP20 packages: above 60
C
derate linearly with 5.5 mW/K.
For DHVQFN20 packages: above 60
C
derate linearly with 4.5 mW/K.
74LVC2244A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 5 — 3 November 2011
4 of 17
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