CY62137EV30 MoBL
®
2-Mbit (128 K × 16) Static RAM
2-Mbit (128 K × 16) Static RAM
Features
■
■
■
■
Very high speed: 45 ns
Wide voltage range: 2.20 V to 3.60 V
Pin compatible with CY62137CV30
Ultra low standby power
❐
Typical standby current: 1
A
❐
Maximum standby current: 7
A
Ultra low active power
❐
Typical active current: 2 mA at f = 1 MHz
Easy memory expansion with CE and OE features
Automatic power-down when deselected
Complementary metal oxide semiconductor (CMOS) for
optimum speed and power
Byte power-down feature
Offered in Pb-free 48-ball very fine-pitch ball grid array
(VFBGA) and 44-pin thin small outline package (TSOP II)
package
■
is ideal for providing More Battery Life™ (MoBL
®
) in portable
applications such as cellular telephones. The device also has an
automatic power down feature that significantly reduces power
consumption by 90% when addresses are not toggling. The
device can also be put into standby mode reducing power
consumption when deselected (CE HIGH or both BLE and BHE
are HIGH). The input and output pins (I/O
0
through I/O
15
) are
placed in a high impedance state when: deselected (CE HIGH),
outputs are disabled (OE HIGH), both Byte High Enable and Byte
Low Enable are disabled (BHE, BLE HIGH), or during a write
operation (CE LOW and WE LOW).
Writing to the device is accomplished by asserting Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O
0
through I/O
7
), is
written into the location specified on the address pins (A
0
through
A
16
). If Byte High Enable (BHE) is LOW, then data from I/O pins
(I/O
8
through I/O
15
) is written into the location specified on the
address pins (A
0
through A
16
).
Reading from the device is accomplished by asserting Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then
data from the memory location specified by the address pins
appears on I/O
0
to I/O
7
. If Byte High Enable (BHE) is LOW, then
data from memory appears on I/O
8
to I/O
15
. See the
Truth Table
on page 11
for a complete description of read and write modes.
The CY62137EV30 is available in 48-ball VFBGA and 44-pin
TSOPII packages.
For a complete list of related documentation,
click here.
■
■
■
■
■
Functional Description
The CY62137EV30 is a high performance CMOS static RAM
organized as 128K words by 16 bits. This device features
advanced circuit design to provide ultra low active current. This
Logic Block Diagram
DATA IN DRIVERS
A
10
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
ROW DECODER
128K x 16
RAM Array
SENSE AMPS
I/O
0
– I/O
7
I/O
8
– I/O
15
COLUMN DECODER
BHE
WE
CE
OE
BLE
BHE
BLE
A
13
A
14
A
15
A
16
A
12
Pow
-
er Down
Circuit
CE
A
11
Cypress Semiconductor Corporation
Document Number: 38-05443 Rev. *I
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised November 24, 2015
CY62137EV30 MoBL
®
Contents
Pin Configurations ........................................................... 3
Product Portfolio .............................................................. 3
Maximum Ratings ............................................................. 4
Operating Range ............................................................... 4
Electrical Characteristics ................................................. 4
Capacitance ...................................................................... 5
Thermal Resistance .......................................................... 5
AC Test Loads and Waveforms ....................................... 5
Data Retention Characteristics ....................................... 6
Data Retention Waveform ................................................ 6
Switching Characteristics ................................................ 7
Switching Waveforms ...................................................... 8
Truth Table ...................................................................... 11
Ordering Information ...................................................... 12
Ordering Code Definitions ......................................... 12
Package Diagrams .......................................................... 13
Acronyms ........................................................................ 15
Document Conventions ................................................. 15
Units of Measure ....................................................... 15
Document History Page ................................................. 16
Sales, Solutions, and Legal Information ...................... 18
Worldwide Sales and Design Support ....................... 18
Products .................................................................... 18
PSoC® Solutions ...................................................... 18
Cypress Developer Community ................................. 18
Technical Support ..................................................... 18
Document Number: 38-05443 Rev. *I
Page 2 of 18
CY62137EV30 MoBL
®
Pin Configurations
Figure 1. 48-ball VFBGA pinout (Top View)
[1, 2]
1
BLE
I/O
8
I/O
9
V
SS
V
CC
I/O
14
I/O
15
NC
2
OE
BHE
I/O
10
I/O
11
I/O
12
I/O
13
NC
A
8
3
A
0
A
3
A
5
NC
NC
A
14
A
12
A
9
4
A
1
A
4
A
6
A
7
A
16
A
15
A
13
A
10
5
A
2
CE
I/O
1
I/O
3
I/O
4
I/O
5
WE
A
11
6
NC
I/O
0
I/O
2
Vcc
Vss
I/O
6
I/O
7
NC
A
B
C
D
E
F
G
H
A
4
A
3
A
2
A
1
A
0
CE
I/O
0
I/O
1
I/O
2
I/O
3
V
CC
V
SS
I/O
4
I/O
5
I/O
6
I/O
7
WE
A
16
A
15
A
14
A
13
A
12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
Figure 2. 44-pin TSOP II pinout (Top View)
[1]
A
5
A
6
A
7
OE
BHE
BLE
I/O
15
I/O
14
I/O
13
I/O
12
V
SS
V
CC
I/O
11
I/O
10
I/O
9
I/O
8
NC
A
8
A
9
A
10
A
11
NC
Product Portfolio
Power Dissipation
Product
Min
CY62137EV30-45LL
2.2 V
V
CC
Range (V)
Typ
[3]
3.0 V
Max
3.6 V
45 ns
Speed
(ns)
Operating I
CC
(mA)
f = 1 MHz
Typ
[3]
2
Max
2.5
f = f
max
Typ
[3]
15
Max
20
Standby I
SB2
(A)
Typ
[3]
1
Max
7
Notes
1. NC pins are not connected on the die.
2. Pins D3, H1, G2, H6 and H3 in the 48-ball VFBGA package are address expansion pins for 4 Mb, 8 Mb, 16 Mb, and 32 Mb and 64 Mb respectively.
3. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC(typ.)
, T
A
= 25 °C.
Document Number: 38-05443 Rev. *I
Page 3 of 18
CY62137EV30 MoBL
®
Maximum Ratings
Exceeding the maximum ratings may impair the useful life of the
device. These user guidelines are not tested.
Storage temperature ............................... –65 °C to + 150 °C
Ambient temperature with
power applied ......................................... –55 °C to + 125 °C
Supply voltage to ground
potential
[4, 5]
.............................–0.3 V to (V
CC(MAX)
+ 0.3 V)
DC voltage applied to outputs
in High Z state
[4, 5]
...................–0.3 V to (V
CC(MAX)
+ 0.3 V)
DC input voltage
[4, 5]
................–0.3 V to (V
CC(MAX)
+ 0.3 V)
Output current into outputs (LOW) ............................. 20 mA
Static discharge voltage
(per MIL-STD-883, Method 3015) ......................... > 2001 V
Latch up current .................................................... > 200 mA
Operating Range
Device
Range
Ambient
Temperature
V
CC
[6]
CY62137EV30-45LL Industrial –40 °C to +85 °C 2.2 V to 3.6 V
Electrical Characteristics
Over the Operating Range
Parameter
V
OH
V
OL
V
IH
V
IL
I
IX
I
OZ
I
CC
I
SB1[8]
Description
Output HIGH voltage
Output LOW voltage
Input HIGH voltage
Input LOW voltage
Input leakage current
Output leakage current
V
CC
Operating supply current
Test Conditions
I
OH
= –0.1 mA
I
OH
= –1.0 mA
I
OL
= 0.1 mA
I
OL
= 2.1 mA
V
CC
= 2.7 V to 3.6 V
V
CC
= 2.2 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
GND < V
I
< V
CC
GND < V
O
< V
CC
, Output disabled
f = f
max
= 1/t
RC
f = 1 MHz
Automatic CE power-down
current — CMOS inputs
V
CC
= V
CCmax
I
OUT
= 0 mA
CMOS levels
V
CC
= 2.20 V
V
CC
= 2.70 V
V
CC
= 2.20 V
V
CC
= 2.70 V
45 ns
Min
2.0
2.4
–
–
1.8
2.2
–0.3
–0.3
–1
–1
–
–
–
Typ
[7]
–
–
–
–
–
–
–
–
–
–
15
2.0
1
Max
–
–
0.4
0.4
V
CC
+ 0.3
V
CC
+ 0.3
0.6
0.8
+1
+1
20
2.5
7
A
Unit
V
V
V
V
V
V
V
V
A
A
mA
V
CC
= 2.2 V to 2.7 V
CE > V
CC
–0.2 V or
(BHE and BLE) > V
CC
–0.2 V,
V
IN
> V
CC
– 0.2 V, V
IN
< 0.2 V,
f = f
max
(address and data only),
f = 0 (OE and WE),
V
CC
= 3.60 V
CE > V
CC
– 0.2 V or
(BHE and BLE) > V
CC
–0.2 V,
V
IN
> V
CC
– 0.2 V or V
IN
< 0.2 V,
f = 0,
V
CC
= 3.60 V
I
SB2 [8]
Automatic CE power-down
current — CMOS inputs
–
1
7
A
Notes
4. V
IL(min.)
= –2.0 V for pulse durations less than 20 ns.
5. V
IH(max)
= V
CC
+ 0.75 V for pulse durations less than 20 ns.
6. Full device AC operation assumes a 100
s
ramp time from 0 to Vcc(min) and 200
s
wait time after V
CC
stabilization.
7. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC(typ.)
, T
A
= 25 °C.
8. Chip enable (CE) and byte enables (BHE and BLE) need to be tied to CMOS levels to meet the I
SB1
/ I
SB2
/ I
CCDR
specification. Other inputs can be left floating.
Document Number: 38-05443 Rev. *I
Page 4 of 18
CY62137EV30 MoBL
®
Capacitance
Parameter
[9]
C
IN
C
OUT
Description
Input capacitance
Output capacitance
Test Conditions
T
A
= 25 °C, f = 1 MHz, V
CC
= V
CC(typ)
Max
10
10
Unit
pF
pF
Thermal Resistance
Parameter
[9]
JA
JC
Description
Thermal resistance
(junction to ambient)
Thermal resistance
(junction to case)
Test Conditions
Still air, soldered on a 3 × 4.5 inch,
four-layer printed circuit board
48-ball BGA
54
12
44-pin TSOP II Unit
57
17
C/W
C/W
AC Test Loads and Waveforms
Figure 3. AC Test Loads and Waveforms
V
CC
OUTPUT
R1
V
CC
R2
10%
GND
Rise Time = 1 V/ns
ALL INPUT PULSES
90%
90%
10%
Fall Time = 1 V/ns
30 pF
INCLUDING
JIG AND
SCOPE
Equivalent to: THÉVENIN EQUIVALENT
R
TH
OUTPUT
V
TH
Parameters
R1
R2
R
TH
V
TH
2.50 V
16667
15385
8000
1.20
3.0 V
1103
1554
645
1.75
Unit
V
Note
9. Tested initially and after any design or process changes that may affect these parameters.
Document Number: 38-05443 Rev. *I
Page 5 of 18
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