NTD95N02R
Power MOSFET
95 Amps, 24 Volts
N−Channel DPAK
Features
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V
(BR)DSS
24 V
R
DS(ON)
TYP
4.5 mW @ 10 V
5.9 mW @ 4.5 V
I
D
MAX*
95 A
•
•
•
•
•
•
•
•
•
High Power and Current Handling Capability
Fast Switching Performance
Low R
DS(on)
to Minimize Conduction Loss
Low Gate Charge to Minimize Switching Losses
Pb−Free Packages are Available
*I
D
MAX in the product summary table is continuous
and steady at 25°C.
D
Applications
CPU Motherboard Vcore Applications
High Frequency DC−DC Converters
Motor Drives
Bridge Circuits
G
S
Unit
V
V
°C/W
W
4
I
D
I
D
R
qJA
P
D
I
D
R
qJA
P
D
I
D
T
J
,
T
STG
I
S
E
AS
95
32
52
2.4
15.8
100
1.25
12
−55 to
150
45
84
A
A
°C/W
W
A
°C/W
W
A
°C
A
mJ
1
2
3
1 2 3
Gate Drain Source
4
Drain
DPAK
CASE 369D
(Straight Lead)
STYLE 2
YWW
T95
N02RG
1 2
3
DPAK
CASE 369AA
(Surface Mount)
STYLE 2
MAXIMUM RATINGS
(T
J
= 25°C unless otherwise specified)
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Thermal Resistance, Junction−to−Case
Total Power Dissipation @ T
A
= 25°C
Drain Current –
− Continuous @ T
A
= 25°C, Limited by Package
− Continuous @ T
A
= 25°C, Limited by Wires
Thermal Resistance, Junction−to− Ambient
(Note 1)
− Total Power Dissipation @ T
A
= 25°C
− Drain Current − Continuous @ T
A
= 25°C
Thermal Resistance, Junction−to−Ambient
(Note 2)
− Total Power Dissipation @ T
A
= 25°C
− Drain Current − Continuous @ T
A
= 25°C
Operating Junction and Storage Temperature
Continuous Source Current (Body Diode)
Single Pulse Drain−to−Source Avalanche
Energy – (V
DD
= 25 V, V
G
= 10, I
PK
= 13 A,
L = 1 mH, R
G
= 25
W)
Lead Temperature for Soldering Purposes
(1/8 in from case for 10 seconds)
Symbol
V
DSS
V
GS
R
qJC
P
D
Value
24
±20
1.45
86
MARKING DIAGRAMS
& PIN ASSIGNMENTS
4
Drain
YWW
T95
N02RG
2
1
3
Drain
Gate
Source
4
T
L
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq
[1 oz] including traces).
2. Surface mounted on FR4 board using the minimum recommended pad size
(Cu area = 0.412 in sq).
Y
WW
T95N02R
G
= Year
= Work Week
= Device Code
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
©
Semiconductor Components Industries, LLC, 2006
1
July, 2006 − Rev. 3
Publication Order Number:
NTD95N02R/D
NTD95N02R
THERMAL RESISTANCE RATINGS
Parameter
Junction−to−Case (Drain)
Junction−to−Ambient – Steady State (Note 3)
Junction−to−Ambient – Steady State (Note 4)
Symbol
R
qJC
R
qJA
R
qJA
Value
1.45
52
100
Unit
°C/W
3. Surface mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces).
4. Surface mounted on FR4 board using the minimum recommended pad size (Cu area = 0.412 in sq).
ELECTRICAL CHARACTERISTICS
(T
J
= 25°C unless otherwise noted)
Parameter
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Drain−to−Source Breakdown Voltage
Temperature Coefficient
Zero Gate Voltage Drain Current
V
(BR)DSS
V
(BR)DSS
/T
J
Symbol
Test Condition
V
GS
= 0 V, I
D
= 250
mA
Min
Typ
Max
Unit
24
29
15
V
mV/°C
1.5
10
±100
nA
mA
I
DSS
V
GS
= 0 V, V
DS
= 20 V
T
J
= 25°C
T
J
= 125°C
Gate−to−Source Leakage
ON CHARACTERISTICS
(Note 5)
Gate Threshold Voltage
Negative Threshold Temperature
Coefficient
Drain−to−Source On−Resistance
I
GSS
V
GS(TH)
V
GS(TH)
/T
J
R
DS(on)
V
DS
= 0 V, V
GS
=
±20
V
V
GS
= V
DS
, I
D
= 250
mA
1.0
5.0
V
GS
= 4.5 V, I
D
= 10 A
V
GS
= 10 V, I
D
= 20 A
V
GS
= 10 V, I
D
= 10 A
5.9
4.5
30
2.0
V
mV/°C
8.0
5.0
mW
S
pF
Forward Transconductance
gFS
CHARGES, CAPACITANCES AND GATE RESISTANCE
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
C
ISS
C
OSS
C
RSS
Q
T
Q
GS
Q
GD
SWITCHING CHARACTERISTICS
Turn−on Delay Time
Rise Time
Turn−off Time
Fall Time
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
Charge Time
Discharge Time
Reverse Recovery Charge
V
SD
t
RR
T
a
T
b
Q
RR
V
GS
= 0 V, d
ISD
/dt = 100 A/ms,
I
S
= 20 A
V
GS
= 0 V, I
S
= 20 A
T
J
= 25°C
0.83
45
20
30
50
nC
1.2
V
ns
t
d(on)
t
r
t
d(off)
t
f
V
GS
= 10 V, V
DD
= 10 V,
I
D
= 30 A, R
G
= 3
W
10
82
26
70
ns
V
GS
= 4.5 V, V
DS
= 10 V; I
D
= 10 A
V
GS
= 0 V, f = 1.0 MHz, V
DS
= 20 V
2400
1020
390
21
4.4
9.1
nC
5. Pulse Test: Pulse Width
≤
300
ms,
Duty Cycle
≤
2%.
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2
NTD95N02R
TYPICAL CHARACTERISTICS
200
180
I
D
, DRAIN CURRENT (A)
160
140
120
100
80
60
40
20
0
0
1
2
3
4
5
6
7
8
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
= 10 V
7.0 V
5.0 V
220
T
J
= 25°C
I
D
, DRAIN CURRENT (A)
4.2 V
4.0 V
3.6 V
3.4 V
3.2 V
3.0 V
2.8 V
2.6 V
2.4 V
9
10
200
180
160
140
120
100
80
60
40
20
0
0
1
2
T
J
= 100°C
T
J
= 25°C
T
J
= −55°C
3
4
5
6
V
DS
w
10 V
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
Figure 2. Transfer Characteristics
0.009
0.008
0.007
0.006
0.005
0.004
0.003
I
D
= 95 A
T
J
= 25°C
0.016
0.014
0.012
0.010
0.008
0.006
0.004
0.002
10
V
GS
= 10 V
30
50
70
90
110
130
150
170
V
GS
= 4.5 V
T
J
= 25°C
3
4
5
6
7
8
9
10
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
I
D
, DRAIN CURRENT (A)
Figure 3. On−Resistance versus
Gate−to−Source Voltage
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
1.8
1.6
1.4
1.2
1.0
0.8
0.6
−50
I
D
= 95 A
V
GS
= 10 V
100000
V
GS
= 0 V
I
DSS
, LEAKAGE (nA)
10000
T
J
= 150°C
1000
T
J
= 100°C
−25
0
25
50
75
100
125
150
100
2
4
T
J
, JUNCTION TEMPERATURE (°C)
6
8
10
12
14
16
18
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
20
Figure 5. On−Resistance Variation with
Temperature
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3
Figure 6. Drain−to−Source Leakage Current
versus Voltage
NTD95N02R
TYPICAL CHARACTERISTICS
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
5000
4500
C, CAPACITANCE (pF)
4000
3500
3000
2500
2000
1500
1000
500
0
10
5
0
5
10
15
C
RSS
20
C
RSS
C
OSS
C
ISS
C
ISS
V
DS
= 0 V
6
5
Q
T
4
3
2
1
0
Q
GS
V
DS
Q
GD
4
V
GS
8
12
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
= 0 V
T
J
= 25°C
I
D
= 10 A
T
J
= 25°C
0
4
8
12
16
20
Q
g
, TOTAL GATE CHARGE (nC)
V
GS
V
DS
0
24
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and Drain−to−Source
Voltage versus Total Charge
1000
V
DS
= 10 V
I
D
= 30 A
V
GS
= 10 V
100
t, TIME (ns)
t
r
t
f
t
d(off)
10
t
d(on)
100
90
I
S
, SOURCE CURRENT (A)
80
70
60
50
40
30
20
10
V
GS
= 0 V
T
J
= 25°C
1
1
10
R
G
, GATE RESISTANCE (W)
100
0
0.4
0.6
0.8
1.0
1.2
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
Figure 10. Diode Forward Voltage versus
Current
ORDERING INFORMATION
Device
NTD95N02R
NTD95N02RG
NTD95N02R−001
NTD95N02R−001G
NTD95N02RT4
NTD95N02RT4G
Package
DPAK
DPAK
(Pb−Free)
DPAK
DPAK
(Pb−Free)
DPAK
DPAK
(Pb−Free)
Shipping
†
75 Units / Rail
75 Units / Rail
75 Units / Rail
75 Units / Rail
2500 Units / Tape & Reel
2500 Units / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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4
NTD95N02R
PACKAGE DIMENSIONS
DPAK (SINGLE GUAGE)
CASE 369AA−01
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
INCHES
MIN
MAX
0.235 0.245
0.250 0.265
0.086 0.094
0.025 0.035
0.018 0.024
0.030 0.045
0.386 0.410
0.018 0.023
0.090 BSC
0.180 0.215
0.024 0.040
0.020
−−−
0.035 0.050
0.155
−−−
MILLIMETERS
MIN
MAX
5.97
6.22
6.35
6.73
2.19
2.38
0.63
0.89
0.46
0.61
0.77
1.14
9.80 10.40
0.46
0.58
2.29 BSC
4.57
5.45
0.60
1.01
0.51
−−−
0.89
1.27
3.93
−−−
−T−
B
V
R
4
SEATING
PLANE
C
E
A
S
1
2
3
Z
H
U
F
L
D
2 PL
J
DIM
A
B
C
D
E
F
H
J
L
R
S
U
V
Z
0.13 (0.005)
M
T
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
SOLDERING FOOTPRINT*
6.20
0.244
3.0
0.118
2.58
0.101
5.80
0.228
1.6
0.063
6.172
0.243
SCALE 3:1
mm
inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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5