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74LVT244A; 74LVTH244A
3.3 V octal buffer/line driver; 3-state
Rev. 04 — 3 September 2008
Product data sheet
1. General description
The 74LVT244A; 74LVTH244A is a high-performance BiCMOS product designed for V
CC
operation at 3.3 V.
This device is an octal buffer that is ideal for driving bus lines. The device features two
output enables (1OE, 2OE), each controlling four of the 3-state outputs.
2. Features
I
I
I
I
I
I
I
I
I
I
Octal bus interface
3-state buffers
Output capability: +64 mA and
−32
mA
TTL input and output switching levels
Input and output interface capability to systems at 5 V supply
Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs
Live insertion and extraction permitted
Power-up 3-state
No bus current loading when output is tied to 5 V bus
Latch-up protection
N
JESD78 Class II exceeds 500 mA
I
ESD protection:
N
HBM JESD22-A114E exceeds 2000 V
N
MM JESD22-A115-A exceeds 200 V
3. Ordering information
Table 1.
Ordering information
Package
Temperature range Name
74LVT244AD
74LVTH244AD
74LVT244ADB
74LVTH244ADB
74LVT244APW
74LVTH244APW
74LVT244ABQ
74LVTH244ABQ
−40 °C
to +85
°C
−40 °C
to +85
°C
TSSOP20
−40 °C
to +85
°C
SSOP20
−40 °C
to +85
°C
SO20
Description
plastic small outline package; 20 leads;
body width 7.5 mm
plastic shrink small outline package; 20 leads;
body width 5.3 mm
Version
SOT163-1
SOT339-1
Type number
plastic thin shrink small outline package; 20 leads; SOT360-1
body width 4.4 mm
SOT764-1
DHVQFN20 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads;
20 terminals; body 2.5
×
4.5
×
0.85 mm
NXP Semiconductors
74LVT244A; 74LVTH244A
3.3 V octal buffer/line driver; 3-state
4. Functional diagram
1A0
1Y0
2
18
4
1A1
1Y1
16
1
EN
18
16
14
12
6
1A2
1Y2
14
2
8
1
1A3
1OE
1Y3
12
4
6
8
11
2A0
2Y0
9
19
EN
9
7
5
3
mna826
13
2A1
2Y1
7
11
13
15
2A2
2Y2
5
15
17
17
19
2A3
2OE
2Y3
3
mna825
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
74LVT_LVTH244A_4
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 3 September 2008
2 of 15
NXP Semiconductors
74LVT244A; 74LVTH244A
3.3 V octal buffer/line driver; 3-state
5. Pinning information
5.1 Pinning
74LVT244A
74LVTH244A
1OE
2
3
4
5
6
7
8
9
GND 10
2A0 11
GND
(1)
1
terminal 1
index area
1A0
2Y3
1OE
1A0
2Y3
1A1
2Y2
1A2
2Y1
1A3
2Y0
1
2
3
4
5
6
7
8
9
20 V
CC
19 2OE
18 1Y0
17 2A3
16 1Y1
15 2A2
14 1Y2
13 2A1
12 1Y3
11 2A0
001aae510
74LVT244A
74LVTH244A
20 V
CC
19 2OE
18 1Y0
17 2A3
16 1Y1
15 2A2
14 1Y2
13 2A1
12 1Y3
1A1
2Y2
1A2
2Y1
1A3
2Y0
GND 10
001aah764
Transparent top view
(1) The die substrate is attached to this pad using a
conductive die attach material. It cannot be used as a
supply pin or input.
Fig 3.
Pin configuration for SO20 and (T)SSOP20
Fig 4.
Pin configuration for DHVQFN20
5.2 Pin description
Table 2.
Symbol
1OE, 2OE
1A0, 1A1, 1A2, 1A3
2Y0, 2Y1, 2Y2, 2Y3
GND
2A0, 2A1, 2A2, 2A3
1Y0, 1Y1, 1Y2, 1Y3,
V
CC
Pin description
Pin
1, 19
2, 4, 6, 8
9, 7, 5, 3
10
Description
output enable input (active low)
data input
data output
ground (0 V)
11, 13, 15, 17 data input
18, 16, 14, 12 data output
20
supply voltage
74LVT_LVTH244A_4
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 3 September 2008
3 of 15
NXP Semiconductors
74LVT244A; 74LVTH244A
3.3 V octal buffer/line driver; 3-state
6. Functional description
6.1 Function table
Table 3.
Control
nOE
L
H
[1]
Function table
[1]
Input
nAn
L
H
X
Output
nYn
L
H
Z
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
T
stg
T
j
P
tot
[1]
[2]
[3]
Parameter
supply voltage
input voltage
output voltage
input clamping current
output clamping current
output current
storage temperature
junction temperature
total power dissipation
Conditions
[1]
Min
−0.5
−0.5
−0.5
-
-
-
-
−65
[2]
Max
+4.6
+7.0
+7.0
−50
−50
128
−64
+150
150
500
Unit
V
V
V
mA
mA
mA
mA
°C
°C
mW
output in OFF-state or
HIGH-state
V
I
< 0 V
V
O
< 0 V
output in LOW-state
output in HIGH-state
[1]
-
T
amb
=
−40
to +85
°C
[3]
The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability.
For SO20 packages: above 70
°C
derate linearly with 8 mW/K.
For SSOP20 and TSSOP20 packages: above 60
°C
derate linearly with 5.5 mW/K.
For DHVQFN20 packages: above 60
°C
derate linearly with 4.5 mW/K.
8. Recommended operating conditions
Table 5.
Symbol
V
CC
V
I
I
OH
Operating conditions
Parameter
supply voltage
input voltage
HIGH-level output current
Conditions
Min
2.7
0
-
Typ
-
-
-
Max
3.6
5.5
−32
Unit
V
V
mA
74LVT_LVTH244A_4
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 3 September 2008
4 of 15
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