Micrel, Inc.
ULTRA PRECISION 4×4 CML
SWITCH WITH INTERNAL
I/O TERMINATION
Precision Edge
®
SY58040U
SY58040U
FEATURES
■
Provides crosspoint switching between any input
pair to any output pair
■
Ultra-low jitter design:
• 67fs
RMS
phase jitter (typ)
■
Guaranteed AC performance over temperature and
voltage:
• DC to >5Gbps throughput
• <350ps propagation delay
• <60ps t
r
/ t
f
times
• <25ps skew (output-to-output)
Unique, patent-pending, channel-to-channel
isolation design provides superior crosstalk
performance
Unique, patent-pending, 50Ω input termination
extended CMVR, and VT pin accepts DC- and AC-
coupled differential inputs
400mV CML output swing
50Ω source terminated outputs minimize round-trip
reflections
Power supply 2.5V ±5% or 3.3V ±10%
–40°C to +85°C temperature range
Available in 44-pin (7mm × 7mm) QFN package
Pb-Free green package
Precision Edge
®
DESCRIPTION
The SY58040U is a low jitter, low skew, high-speed
4×4 crosspoint switch optimized for precision telecom and
enterprise server/storage distribution applications. The
SY58040U distributes clock frequencies from DC to 4GHz,
and data rates to 5Gbps guaranteed over temperature and
voltage.
The SY58040U differential input includes Micrel’s unique,
3-pin input termination architecture that directly interfaces
to any differential signal (AC- or DC-coupled) as small as
100mV (200mV
pp
) without any level shifting or termination
resistor networks in the signal path. The outputs are 50Ω
source-terminated CML with extremely fast rise/fall times
guaranteed to be less than 60ps.
The SY58040U features a patent-pending isolation design
that significantly improves on channel-to-channel crosstalk
performance.
The SY58040U operates from a 2.5V ±5% or 3.3V ±10%
supply and is guaranteed over the full industrial temperature
range of –40°C to +85°C. The SY58040U is part of Micrel’s
high-speed, Precision Edge
®
product line.
Datasheets and support documentation can be found on
Micrel’s web site at: www.micrel.com.
■
■
■
■
■
■
■
■
APPLICATIONS
■
■
■
■
Data communication systems
All SONET/SDH data/clock applications
All Fibre Channel applications
All Gigabit Ethernet applications
United States Patent No. RE44,134
Precision Edge is a registered trademark of Micrel, Inc.
M9999-103009
hbwhelp@micrel.com or (408) 955-1690
Rev.: F
Amendment: /0
1
Issue Date: October 2011
Micrel, Inc.
SY58040U
FUNCTIONAL bLOCk DIAGRAM
TRUTH TAbLES
Input Select Address Table
SIN1
0
0
1
1
SIN0
0
1
0
1
INPUT
IN0
IN1
IN2
IN3
SOUT1
0
0
1
1
Output Select Address Table
SOUT0
0
1
0
1
OUTPUT
Q0
Q1
Q2
Q3
M9999-103009
hbwhelp@micrel.com or (408) 955-1690
2
Micrel, Inc.
SY58040U
PACkAGE/ORDERING INFORMATION
Ordering Information
(1)
Part Number
SY58040UMY
(3)
Package Operating
Type
Range
QFN-44
Pb-Free
Industrial
Industrial
Package
Marking
SY58040U Pb-Free
bar-line indicator
SY58040U Pb-Free
bar-line indicator
SY58040UMYTR
(2, 3)
QFN-44
Pb-Free
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A
= 25°C, DC electricals only.
2. Tape and Reel.
3. Pb-Free package recommended for new designs.
44-Pin QFN (QFN-44)
PIN DESCRIPTION
Pin Number
17, 15,
10, 8,
4, 2,
41, 39
16, 9,
3, 40
14,
11,
1,
42
18
19
38
37
5
7
Pin Name
IN0, /IN0
IN1, /IN1
IN2, /IN2
IN3, /IN3
VT0, VT1
VT2, VT3
VRef_AC0
VRef_AC1
VRef_AC2
VRef_AC3
SIN0
SIN1
SOUT0
SOUT1
CONF,
LOAD
Pin Function
Differential Inputs: These input pairs are the differential signal inputs to the device. Inputs accept
AC or DC-coupled signals as small as 100mV. Each pin of a pair internally terminates to a VT pin
through 50Ω. Note that these inputs will default to an indeterminate state if left open. Please refer to
the “Input Interface Applications” section for more details.
Input Termination Center-Tap: Each side of the differential input pair terminates to a VT pin. The VT
pins provide a center-tap to a termination network for maximum interface flexibility. See “Input
Interface Applications” section for more details.
Reference Voltage: This output biases to V
CC
–1.2V. It is used when AC coupling the inputs.
Connect VRef-AC output pin to the VT input pin. Bypass each VRef-AC pin with a 0.01µF low ESR
capacitor to V
CC
. See “Input Interface Applications” section for more details.
These single-ended TTL/CMOS-compatible inputs address the data inputs. Note that these inputs
are internally connected to a 25kΩ pull-up resistor and will default to a logic HIGH state if left open.
These single-ended TTL/CMOS-compatible inputs address the data outputs. Note that these inputs
are internally connected to a 25kΩ pullup resistor and will default to a logic HIGH state if left open.
These single-ended TTL/CMOS compatible inputs control the transfer of the addresses to the
internal multiplexers. See “Address Tables” and “Timing Diagram” sections for more details. Note
that these inputs are internally connected to a 25kΩ pull-up resistor and will default to a logic HIGH
state if left open.
Configuration Sequence
1.
Load: Loads configuration into buffer, while Configuration Buffer holds existing switch configuration.
2.
Configuration: Loads new configuration into the Configuration Buffer and updates switch configuration.
Buffer Mode
The SY58040U defaults to buffer mode (IN-to-Q) if the load and configuration control signals are floating.
23, 24,
Q0, /Q0,
26, 27,
Q1, /Q1,
29, 30
Q2, /Q2,
32, 33
Q3, /Q3,
6, 22, 25,
VCC
28, 31, 34
12, 13, 20, 21,
GND,
35, 36, 43, 44 Exposed pad
Differential Outputs: These CML output pairs are the outputs of the device. Please refer to the truth
table below for details. Unused output pairs may be left open. Each output is designed to drive
400mV into 100Ω across the pair, or 50Ω to V
CC
.
Positive power supply. Bypass with 0.1µF//0.01µF low ESR capacitors and place as close to each
V
CC
pin.
Ground. GND and EPad must both be connected to most negative potential of chip ground.
M9999-103009
hbwhelp@micrel.com or (408) 955-1690
3
Micrel, Inc.
SY58040U
Absolute Maximum Ratings
(1)
Power Supply Voltage (V
CC
) .......................–0.5V to +4.0V
Input Voltage (V
IN
) ...........................................–0.5V to V
CC
CML Output Voltage (V
OUT
) ..........V
CC
–0.5V to V
CC
+5.0V
Termination Current
(3)
Source or sink current on VT pin ........................ ±100mA
Input Current
(3)
Source or sink current on IN, /IN .......................... ±50mA
V
REF-AC
Current
(3)
Source or sink current on IN, /IN ............................ ±2mA
Lead Temperature (soldering, 20 sec.) ...................... 260°C
Storage Temperature Range (T
S
) ............ –65°C to +150°C
Operating Ratings
(2)
Power Supply Voltage (V
CC
) ................. +2.375V to +3.60V
Ambient Temperature Range (T
A
) .............. –40°C to +85°C
Package Thermal Resistance
(4)
QFN (θ
JA
)
Still-Air ............................................................. 23°C/W
QFN (ψ
JB
)
Junction-to-board ............................................. 12°C/W
DC ELECTRICAL CHARACTERISTICS
(5)
T
A
= –40°C to +85°C, unless otherwise stated.
Symbol
V
CC
I
CC
R
IN
Parameter
Power Supply Voltage
Power Supply Current
Condition
V
CC
= 3.3V.
V
CC
= 2.5V.
Min
2.375
3.0
Typ
2.5
3.3
225
Max
2.625
3.6
300
Units
V
V
mA
No load, max. V
CC
.
Includes current from internal 50Ω pull-up
on each output.
45
90
Note 6
V
CC
–1.6
0
See Figure 1a.
See Figure 1b.
0.1
0.2
R
DIFF_IN
V
IH
V
IL
V
IN
V
DIFF_IN
V
T_IN
Input Resistance (IN-to-V
T,
/IN-to-V
T
)
Differential Input Resistance
(IN-to-/IN)
50
100
55
110
V
CC
V
IH
–0.1
1.7
Ω
Ω
V
V
V
V
Input HIGH Voltage
(IN-to-/IN)
Input LOW Voltage
(IN-to-/IN)
Input Voltage Swing
(IN-to-/IN)
Differential Input Voltage Swing
|IN – /IN|
IN to V
T
(IN-to-/IN)
Output Reference Voltage
1.28
V
CC
–1.3 V
CC
–1.2 V
CC
–1.1
V
V
V
REF-AC
Notes:
1. Permanent device damage may occur if ratings in the “Absolute Maximum Ratings” section are exceeded. This is a stress rating only and functional
operation is not implied for conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings
conditions for extended periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Due to the limited drive capability, use for input of the same package only.
4. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device’s most negative potential on the PCB. θ
JA
uses 4-layer in
still-air number, unless otherwise stated.
5. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
6. V
IH
(min) not lower than 1.2V.
M9999-103009
hbwhelp@micrel.com or (408) 955-1690
4
Micrel, Inc.
SY58040U
CML OUTPUT DC ELECTRICAL CHARACTERISTICS
(7)
Symbol
V
OH
V
OUT
V
DIFF_OUT
R
OUT
V
CC
= 2.5V ±5% or 3.3V ±10%; T
A
= –40°C to +85°C; R
L
= 100Ω across each output pair, unless otherwise stated.
Parameter
Condition
Min
Typ
Output HIGH Voltage
Q, /Q
Output Differential Swing
Q, /Q
Differential Output Voltage Swing
Q, /Q
Output Source Impedance
See Figure 1a.
See Figure 1b.
V
CC
–0.040 V
CC
–0.010
325
650
45
400
800
50
55
Max
V
CC
Units
V
mV
mV
Ω
LVTTL/CMOS DC ELECTRICAL CHARACTERISTICS
(7)
V
CC
= 2.5V ±5% or 3.3V ±10%; T
A
= –40°C to +85°C, unless otherwise stated.
Symbol
V
IH
I
IH
Parameter
Condition
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
V
IL
= 0V.
–125
–300
Min
2.0
Typ
Max
V
CC
0.8
30
Units
V
V
µA
µA
V
IL
I
IL
Note:
7. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
M9999-103009
hbwhelp@micrel.com or (408) 955-1690
5
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