To learn more about ON Semiconductor, please visit our website at
www.onsemi.com
Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers
will need to change in order to meet ON Semiconductor’s system requirements. Since the ON Semiconductor
product management systems do not have the ability to manage part nomenclature that utilizes an underscore
(_), the underscore (_) in the Fairchild part numbers will be changed to a dash (-). This document may contain
device numbers with an underscore (_). Please check the ON Semiconductor website to verify the updated
device numbers. The most current and up-to-date ordering information can be found at
www.onsemi.com.
Please
email any questions regarding the system integration to
Fairchild_questions@onsemi.com.
ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number
of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right
to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON
Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON
Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA
Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended
or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out
of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor
is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
74LVT16646 • 74LVTH16646 Low Voltage 16-Bit Transceiver/Register with 3-STATE Outputs
January 2000
Revised October 2001
74LVT16646 • 74LVTH16646
Low Voltage 16-Bit Transceiver/Register
with 3-STATE Outputs
General Description
The LVT16646 and LVTH16646 contains sixteen non-
inverting bidirectional registered bus transceivers providing
multiplexed transmission of data directly from the input bus
or from the internal storage registers. Each byte has sepa-
rate control inputs which can be shorted together for full
16-bit operation. The DIR inputs determine the direction of
data flow through the device. The CPAB and CPBA inputs
load data into the registers on the LOW-to-HIGH transition
(see Functional Description).
The LVTH16646 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These transceivers are designed for low-voltage (3.3V)
V
CC
applications, but with the capability to provide a TTL
interface to a 5V environment. The LVT16646 and
LVTH16646 are fabricated with an advanced BiCMOS
technology to achieve high speed operation similar to 5V
ABT while maintaining low power dissipation.
Features
s
Input and output interface capability to systems at
5V V
CC
s
Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH16646)
s
Also available without bushold feature (74LVT16646)
s
Live insertion/extraction permitted
s
Power Up/Down high impedance provides
glitch-free bus loading
s
Outputs source/sink
−
32 mA/
+
64 mA
s
Latch-up conforms to JEDEC JED78
s
ESD performance:
Human-body model
>
2000V
Machine model
>
200V
Charged-device model
>
1000V
Ordering Code:
Order Number
74LVT16646MEA
(Preliminary)
74LVT16646MTD
(Preliminary)
74LVTH16646MEA
74LVTH16646MTD
Package Number
MS56A
MTD56
MS56A
MTD56
Package Description
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
The data output functions may be enabled or disabled by various signals at the OE and DIR inputs. Data input functions are always enabled; i.e.,
data at the bus pins will be stored on every LOW-to-HIGH transition of the appropriate clock inputs. Also applies to data I/O (A and B: 8-15) and #2 control
pins.
www.fairchildsemi.com
2
74LVT16646 • 74LVTH16646
Functional Description
In the transceiver mode, data present at the HIGH imped-
ance port may be stored in either the A or B register or
both. The select (SAB
n
, SBA
n
) controls can multiplex
stored and real-time. The examples shown below demon-
strate the four fundamental bus-management functions
that can be performed.
The direction control (DIR
n
) determines which bus will
receive data when OE
n
is LOW. In the isolation mode (OE
n
HIGH), A data may be stored in one register and/or B data
may be stored in the other register. When an output func-
tion is disabled, the input function is still enabled and may
be used to store and transmit data. Only one of the two
busses, A or B, may be driven at a time.
Real-Time Transfer
Bus B to Bus A
Real-Time Transfer
Bus A to Bus B
OE DIR CPAB CPBA SAB SBA
L
L
X
X
X
L
OE DIR CPAB CPBA SAB SBA
L
H
X
X
L
X
Transfer Storage
Data to A or B
Storage
OE DIR CPAB CPBA SAB SBA
OE DIR CPAB CPBA SAB SBA
L
L
L
H
X
H or L
H or L
X
X
H
H
X
L
L
H
H
H
L
X
X
X
X
L
X
X
X
X
L
X
X
X
X
3
www.fairchildsemi.com
74LVT16646 • 74LVTH16646
Logic Diagrams
Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays.
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
