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74ALVC14
Hex inverting Schmitt trigger
Rev. 03 — 15 February 2005
Product data sheet
1. General description
The 74ALVC14 is a high-performance, low-power, low-voltage, Si-gate CMOS device and
superior to most advanced CMOS compatible TTL families.
The 74ALVC14 provides six inverting buffers with Schmitt-trigger action. It is capable of
transforming slowly changing input signals into sharply defined, jitter-free output signals.
2. Features
s
s
s
s
s
s
s
s
Wide supply voltage range from 1.65 V to 3.6 V
3.6 V tolerant inputs/outputs
CMOS low power consumption
Direct interface with TTL levels (2.7 V to 3.6 V)
Power-down mode
Unlimited input rise and fall times
Latch-up performance exceeds 250 mA
Complies with JEDEC standard:
x
JESD8-7 (1.65 V to 1.95 V)
x
JESD8-5 (2.3 V to 2.7 V)
x
JESD8-B/JESD36 (2.7 V to 3.6 V)
s
ESD protection:
x
HBM EIA/JESD22-A114-B exceeds 2000 V
x
MM EIA/JESD22-A115-A exceeds 200 V
s
Multiple package options
3. Quick reference data
Table 1:
Symbol
Quick reference data
Parameter
Conditions
V
CC
= 1.8 V; C
L
= 30 pF;
R
L
= 1 kΩ
V
CC
= 2.5 V; C
L
= 30 pF;
R
L
= 500
Ω
V
CC
= 2.7 V; C
L
= 50 pF;
R
L
= 500
Ω
V
CC
= 3.3 V; C
L
= 50 pF;
R
L
= 500
Ω
Min
-
-
-
-
Typ
2.9
2.2
2.8
2.4
Max
-
-
-
-
Unit
ns
ns
ns
ns
t
PHL
, t
PLH
propagation delay nA
to nY
Philips Semiconductors
74ALVC14
Hex inverting Schmitt trigger
Quick reference data
…continued
Parameter
input capacitance
power dissipation
capacitance per buffer
V
CC
= 3.3 V
[1] [2]
Table 1:
Symbol
C
I
C
PD
Conditions
Min
-
-
Typ
3.5
25
Max
-
-
Unit
pF
pF
[1]
C
PD
is used to determine the dynamic power dissipation (P
D
in
µW).
P
D
= C
PD
×
V
CC2
×
f
i
×
N +
Σ(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
Σ(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
[2]
The condition is V
I
= GND to V
CC
.
4. Ordering information
Table 2:
Ordering information
Package
Temperature range Name
74ALVC14D
74ALVC14PW
74ALVC14BQ
−40 °C
to +85
°C
−40 °C
to +85
°C
−40 °C
to +85
°C
SO14
TSSOP14
Description
plastic small outline package; 14 leads;
body width 3.9 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
Version
SOT108-1
SOT402-1
SOT762-1
Type number
DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.5
×
3
×
0.85 mm
9397 750 14592
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 15 February 2005
2 of 16
Philips Semiconductors
74ALVC14
Hex inverting Schmitt trigger
5. Functional diagram
1
2
1
1A
1Y
2
3
4
3
2A
2Y
4
5
6
5
3A
3Y
6
9
8
9
4A
4Y
8
11
5A
5Y
10
11
10
13
6A
6Y
12
13
12
mna204
001aac497
Fig 1. Logic symbol
Fig 2. IEC logic symbol
A
Y
mna025
Fig 3. Logic diagram (one Schmitt trigger)
9397 750 14592
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 15 February 2005
3 of 16
Philips Semiconductors
74ALVC14
Hex inverting Schmitt trigger
6. Pinning information
6.1 Pinning
terminal 1
index area
1Y
2A
1A
1Y
2A
2Y
3A
3Y
GND
1
2
3
4
5
6
7
001aac498
2
3
4
5
6
7
GND
4Y
8
14 V
CC
13 6A
12 6Y
11 5A
10 5Y
9
4A
14 V
CC
13 6A
12 6Y
2Y
3A
3Y
GND
(1)
14
11 5A
10 5Y
9
8
4A
4Y
1
1A
14
001aac499
Transparent top view
The die substrate is attached to the
exposed die pad using conductive die
attach material. It can not be used as
a supply pin or input.
Fig 4. Pin configuration SO14 and
TSSOP14
Fig 5. Pin configuration DHVQFN14
6.2 Pin description
Table 3:
Symbol
1A
1Y
2A
2Y
3A
3Y
GND
4Y
4A
5Y
5A
6Y
6A
V
CC
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Description
1 data input A
1 data output Y
2 data input A
2 data output Y
3 data input A
3 data output Y
ground (0 V)
4 data output Y
4 data input A
5 data output Y
5 data input A
6 data output Y
6 data input A
supply voltage
9397 750 14592
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 15 February 2005
4 of 16
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