VS-8ETH06FP-N3
www.vishay.com
Vishay Semiconductors
Hyperfast Rectifier, 8 A FRED Pt
®
FEATURES
• Hyperfast recovery time
• Low forward voltage drop
• 175 °C operating junction temperature
1
2
• Low leakage current
• Fully isolated package (V
INS
= 2500 V
RMS
)
2L TO-220 FullPAK
• UL pending
• Designed and qualified according to JEDEC
®
-JESD 47
• Material categorization: for definitions of compliance
please see
www.vishay.com/doc?99912
1
Cathode
2
Anode
DESCRIPTION / APPLICATIONS
State of the art hyperfast recovery rectifiers designed with
optimized performance of forward voltage drop, hyperfast
recovery time, and soft recovery.
8A
600 V
1.3 V
18 ns
175 °C
VS-8ETH06FP-N3
PRIMARY CHARACTERISTICS
I
F(AV)
V
R
V
F
at I
F
t
rr
typ.
T
J
max.
Package
Circuit configuration
The planar structure and the platinum doped life time control
guarantee the best overall performance, ruggedness and
reliability characteristics.
These devices are intended for use in PFC boost stage in the
AC/DC section of SMPS, inverters or as freewheeling
diodes.
Their extremely optimized stored charge and low recovery
current minimize the switching losses and reduce over
dissipation in the switching element and snubbers.
2L TO-220 FullPAK
Single
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Repetitive peak reverse voltage
Average rectified forward current
Non-repetitive peak surge current
Repetitive peak forward current
Operating junction and storage temperatures
SYMBOL
V
RRM
I
F(AV)
I
FSM
I
FM
T
J
, T
Stg
T
C
= 108 °C
TEST CONDITIONS
VALUES
600
8
100
16
-65 to +175
°C
A
UNITS
V
ELECTRICAL SPECIFICATIONS
(T
J
= 25 °C unless otherwise specified)
PARAMETER
Breakdown voltage,
blocking voltage
Forward voltage
Reverse leakage current
Junction capacitance
Series inductance
SYMBOL
V
BR
,
V
R
V
F
I
R
C
T
L
S
I
R
= 100 μA
I
F
= 8 A
I
F
= 8 A, T
J
= 150 °C
V
R
= V
R
rated
T
J
= 150 °C, V
R
= V
R
rated
V
R
= 600 V
Measured lead to lead 5 mm from package body
TEST CONDITIONS
MIN.
600
-
-
-
-
-
-
TYP.
-
2.0
1.3
0.3
55
17
8.0
MAX.
-
2.4
1.8
50
500
-
-
μA
pF
nH
V
UNITS
Revision: 26-Oct-17
Document Number: 96429
1
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-8ETH06FP-N3
www.vishay.com
Vishay Semiconductors
TEST CONDITIONS
I
F
= 1 A, dI
F
/dt = 100 A/μs, V
R
= 30 V
I
F
= 8 A, dI
F
/dt = 100 A/μs, V
R
= 30 V
T
J
= 25 °C
T
J
= 125 °C
T
J
= 25 °C
T
J
= 125 °C
T
J
= 25 °C
T
J
= 125 °C
T
J
= 125 °C
I
F
= 8 A
dI
F
/dt = 600 A/μs
V
R
= 390 V
I
F
= 8 A
dI
F
/dt = 200 A/μs
V
R
= 390 V
MIN.
-
-
-
-
-
-
-
-
-
-
-
TYP.
18
20
25
40
2.4
4.8
25
120
33
12
220
MAX.
22
25
-
-
-
-
-
-
-
-
-
A
nC
ns
A
nC
ns
UNITS
DYNAMIC RECOVERY CHARACTERISTICS
(T
C
= 25 °C unless otherwise specified)
PARAMETER
SYMBOL
Reverse recovery time
t
rr
Peak recovery current
Reverse recovery charge
Reverse recovery time
Peak recovery current
Reverse recovery charge
I
RRM
Q
rr
t
rr
I
RRM
Q
rr
THERMAL - MECHANICAL SPECIFICATIONS
PARAMETER
Maximum junction and storage
temperature range
Thermal resistance,
junction-to-case
Thermal resistance,
junction-to-ambient per leg
Thermal resistance,
case-to-heatsink
Weight
Mounting torque
Marking device
Case style 2L TO-220 FullPAK
SYMBOL
T
J
, T
Stg
R
thJC
R
thJA
R
thCS
Typical socket mount
Mounting surface, flat, smooth, and
greased
TEST CONDITIONS
MIN.
-65
-
-
-
-
-
6.0
(5.0)
TYP.
-
3.4
-
0.5
2.0
0.07
-
MAX.
175
4.3
70
-
-
-
12
(10)
g
oz.
kgf · cm
(lbf · in)
UNITS
°C
°C/W
8ETH06FP
I
F
- Instantaneous Forward Current (A)
100
1000
I
R
- Reverse Current (µA)
100
10
1
0.1
T
J
= 175 °C
T
J
= 150 °C
T
J
= 125 °C
T
J
= 100 °C
10
1
T
J
= 175 °C
T
J
= 150 °C
T
J
= 25 °C
T
J
= 25 °C
0.01
0.001
0.1
0
1
2
3
4
0
100
200
300
400
500
600
V
F
- Forward Voltage Drop (V)
Fig. 1 - Typical Forward Voltage Drop Characteristics
V
R
- Reverse Voltage (V)
Fig. 2 - Typical Values of Reverse Current vs. Reverse Voltage
Revision: 26-Oct-17
Document Number: 96429
2
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-8ETH06FP-N3
www.vishay.com
1000
Vishay Semiconductors
C
T
- Junction Capacitance (pF)
100
T
J
= 25 °C
10
0
100
200
300
400
500
600
V
R
- Reverse Voltage (V)
Fig. 3 - Typical Junction Capacitance vs. Reverse Voltage
Z
thJC
- Thermal Impedance (°C/W)
10
1
P
DM
0.1
Single pulse
(thermal resistance)
0.01
0.00001
D = 0.50
D = 0.20
D = 0.10
D = 0.05
D = 0.02
D = 0.01
0.001
0.01
0.1
t
1
t
2
Notes:
1. Duty factor D = t
1
/t
2
.
2. Peak T
J
= P
DM
x Z
thJC
+ T
C
1
10
.
100
0.0001
t
1
- Rectangular Pulse Duration (s)
Fig. 4 - Maximum Thermal Impedance Z
thJC
Characteristics
180
20
18
Allowable Case Temperature (°C)
Average Power Loss (W)
160
16
14
12
10
8
6
4
2
0
DC
RMS limit
140
DC
Square wave (D = 0.50)
Rated V
R
applied
100
See note (1)
80
0
2
4
6
8
10
12
14
120
D = 0.01
D = 0.02
D = 0.05
D = 0.10
D = 0.20
D = 0.50
0
2
4
6
8
10
12
I
F(AV)
- Average Forward Current (A)
Fig. 5 - Maximum Allowable Case Temperature vs.
Average Forward Current
Note
(1)
Formula used: T = T - (Pd + Pd
C
J
REV
) x R
thJC
;
Pd = forward power loss = I
F(AV)
x V
FM
at (I
F(AV)
/D) (see fig. 5);
Pd
REV
= inverse power loss = V
R1
x I
R
(1 - D); I
R
at V
R1
= rated V
R
I
F(AV)
- Average Forward Current (A)
Fig. 6 - Forward Power Loss Characteristics
Revision: 26-Oct-17
Document Number: 96429
3
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-8ETH06FP-N3
www.vishay.com
Vishay Semiconductors
400
V
R
= 390 V
T
J
= 125 °C
T
J
= 25 °C
I
F
= 16 A
I
F
= 8 A
60
V
R
= 390 V
T
J
= 125 °C
T
J
= 25 °C
350
300
50
Q
rr
(nC)
I
F
= 16 A
I
F
= 8 A
1000
t
rr
(ns)
40
250
200
150
100
30
20
50
0
100
10
100
1000
dI
F
/dt (A/µs)
Fig. 7 - Typical Reverse Recovery Time vs. dI
F
/dt
dI
F
/dt (A/µs)
Fig. 8 - Typical Stored Charge vs. dI
F
/dt
(3)
I
F
0
t
rr
t
a
t
b
Q
rr
(2)
(4)
I
RRM
0.5 I
RRM
di
(rec)M
/dt
(5)
0.75 I
RRM
(1)
di
F
/dt
(1) di
F
/dt - rate of change of current
through zero crossing
(2) I
RRM
- peak reverse recovery current
(3) t
rr
- reverse recovery time measured
from zero crossing point of negative
going I
F
to point where a line passing
through 0.75 I
RRM
and 0.50 I
RRM
extrapolated to zero current.
(4)
Q
rr
- area under curve defined by t
rr
and I
RRM
Q
rr
=
t
rr
x I
RRM
2
(5) di
(rec)M
/dt - peak rate of change of
current during t
b
portion of t
rr
Fig. 9 - Reverse Recovery Waveform and Definitions
Revision: 26-Oct-17
Document Number: 96429
4
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-8ETH06FP-N3
www.vishay.com
ORDERING INFORMATION TABLE
Device code
Vishay Semiconductors
VS-
1
1
2
3
4
5
6
7
8
-
-
-
-
-
-
-
-
8
2
E
3
T
4
H
5
06
6
FP
7
-N3
8
Vishay
Semiconductors
product
Current rating (8 = 8 A)
E =
single
T = TO-220, D
2
PAK (TO-263AB)
H = hyperfast recovery
Voltage rating (06 = 600 V)
FP = 2L TO-220 FullPAK
Environmental digit:
-N3 = halogen-free, RoHS-compliant, and totally lead (Pb)-free
ORDERING INFORMATION
(Example)
PREFERRED P/N
VS-8ETH06FP-N3
QUANTITY PER T/R
50
MINIMUM ORDER QUANTITY
1000
PACKAGING DESCRIPTION
Antistatic plastic tube
LINKS TO RELATED DOCUMENTS
Dimensions
Part marking information
www.vishay.com/doc?96157
www.vishay.com/doc?95392
Revision: 26-Oct-17
Document Number: 96429
5
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
