LTC1854/LTC1855/LTC1856
8-Channel,
±10V
Input
12-/14-/16-Bit, 100ksps ADC
Converters with Shutdown
DESCRIPTIO
The LTC
®
1854/LTC1855/LTC1856 are 8-channel, low
power, 12-/14-/16-bit, 100ksps, analog-to-digital con-
verters (ADCs). These ADCs operate from a single 5V
supply and the 8-channel multiplexer can be programmed
for single-ended inputs, pairs of differential inputs, or
combinations of both. In addition, all channels are fault
protected to
±30V.
A fault condition on any channel will
not affect the conversion result of the selected channel.
An onboard precision reference minimizes external com-
ponents. Power dissipation is 40mW at 100ksps and lower
in two power shutdown modes (27.5mW in Nap mode and
40mW in Sleep mode.) DC specifications include
±3LSB
INL for the LTC1856,
±1.5LSB
INL for the LTC1855 and
±1LSB
for the LTC1854.
The internal clock is trimmed for 5ms maximum conver-
sion time and the sampling rate is guaranteed at 100ksps.
A separate convert start input and data ready signal (BUSY)
ease connections to FIFOs, DSPs and microprocessors.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
FEATURES
■
■
■
■
■
■
■
■
■
■
■
■
Single 5V Supply
Sample Rate: 100ksps
8-Channel Multiplexer with
±30V
Protection
±10V
Bipolar Input Range
Single Ended or Differential
±3LSB
INL for the LTC1856,
±1.5LSB
INL for the
LTC1855,
±1LSB
INL for the LTC1854
Power Dissipation: 40mW (Typ)
SPI/MICROWIRE
TM
Compatible Serial I/O
Power Shutdown: Nap and Sleep
SINAD: 87dB (LTC1856)
Operates with Internal or External Reference
Internal Synchronized Clock
28-Pin SSOP Package
APPLICATIO S
■
■
■
■
Industrial Process Control
Multiplexed Data Acquisition Systems
High Speed Data Acquisition for PCs
Digital Signal Processing
TYPICAL APPLICATIO
100kHz, 12-Bit/14-/16-Bit Sampling ADC
2.0
SOFTWARE-PROGRAMMABLE
SINGLE-ENDED OR
DIFFERENTIAL INPUTS
±10V
BIPOLAR INPUT RANGE
COM
CONVST
CH0 LTC1854/ RD
CH1 LTC1855/ SCK
CH2 LTC1856 SDI
CH3
DGND
CH4
SDO
CH5
BUSY
CH6
OV
DD
DV
DD
CH7
AV
DD
MUXOUT
+
–
MUXOUT
AGND3
ADC
+
AGND2
ADC
–
REFCOMP
AGND1
V
REF
INL (LSB)
μP
CONTROL
LINES
3V TO 5V
5V
5V
0.1μF
10μF
10μF
0.1μF
10μF
0.1μF
2.5V
1μF
10μF
0.1μF
U
U
U
LTC1856 Typical INL Curve
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–32768
–16384
0
CODE
185456 G01
16384
32767
185456fa
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LTC1854/LTC1855/LTC1856
ABSOLUTE
(Notes 1, 2)
AXI U
RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW
COM
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
MUXOUT
–
ADC
+
ADC
–
Supply Voltage (OV
DD
= DV
DD
= AV
DD
= V
DD
) ........... 6V
Ground Voltage Difference
DGND, AGND1, AGND2, AGND3 ......................
±0.3V
Analog Input Voltage
ADC
+
, ADC
–
(Note 3) ...................(AGND1 – 0.3V) to (AV
DD
+ 0.3V)
CH0-CH7, COM ..................................................
±30V
Digital Input Voltage (Note 4) ...... (DGND – 0.3V) to 10V
Digital Output Voltage .... (DGND – 0.3V) to (DV
DD
+ 0.3V)
Power Dissipation .............................................. 500mW
Operating Temperature Range
LTC1854C/LTC1855C/LTC1856C ............ 0∞C to 70∞C
LTC1854I/LTC1855I/LTC1856I .......... – 40∞C to 85∞C
Storage Temperature Range ................. – 65∞C to 150∞C
Lead Temperature (Soldering, 10 sec) ................. 300∞C
1
2
3
4
5
6
7
8
9
28 CONVST
27 RD
26 SCK
25 SDI
24 DGND
23 SDO
22 BUSY
21 OV
DD
20 DV
DD
19 AV
DD
18 AGND3
17 AGND2
16 REFCOMP
15 V
REF
MUXOUT
+
10
11
12
13
AGND1 14
G PACKAGE
28-LEAD PLASTIC SSOP
T
JMAX
= 110∞C,
q
JA
= 95∞C/W
ORDER PART NUMBER
LTC1854CG
LTC1854IG
LTC1855CG
LTC1855IG
LTC1856CG
LTC1856IG
Order Options
Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking:
http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
CO VERTER A D
PARAMETER
Resolution
No Missing Codes
Transition Noise
Integral Linearity Error
Differential Linearity Error
Bipolar Zero Error
Bipolar Zero Error Drift
Bipolar Zero Error Match
Bipolar Full-Scale Error
Bipolar Full-Scale Error Drift
The
●
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25∞C.
MUXOUT connected to ADC inputs. (Notes 5, 6)
CONDITIONS
●
●
ULTIPLEXER CHARACTERISTICS
LTC1854
MIN TYP MAX
12
12
0.06
±1
–1
1
±5
±0.1
3
±0.34
±0.45
±2.5
±7
5
±10
96
(Note 7)
(Note 8)
●
●
●
External Reference (Note 11)
●
Internal Reference (Note 11)
External Reference
Internal Reference
●
Bipolar Full-Scale Error Match
Input Common Mode Range
Input Common Mode Rejection Ratio
LTC1855
MIN
TYP MAX
14
14
0.25
±1.5
–1
1.5
±8
±0.1
4
±0.14
±0.40
±2.5
±7
10
±10
96
LTC1856
MIN TYP MAX
16
15
1
±3
–2
4
±23
±0.1
10
±0.1
±0.4
±2.5
±7
15
±10
96
UNITS
Bits
Bits
LSB
RMS
LSB
LSB
LSB
ppm/∞C
LSB
%
%
ppm/∞C
ppm/∞C
LSB
V
dB
185456fa
2
U
W
U
U
W W
W U
W
U
LTC1854/LTC1855/LTC1856
A ALOG I PUT
The
●
denotes the specifications which apply over the full operating temperature range, otherwise
specifications are at T
A
= 25∞C. (Note 5)
PARAMETER
Analog Input Range
Impedance
Capacitance
CONDITIONS
CH0 to CH7, COM
ADC
+
, ADC
–
(Note 3)
CH0 to CH7, COM
MUXOUT
+
, MUXOUT
–
CH0 to CH7, COM
Sample Mode ADC
+
, ADC
–
Hold Mode ADC
+
, ADC
–
Input Leakage Current
ADC
+
, ADC
–
, CONVST = Low
●
DY A IC ACCURACY
SYMBOL
THD
PARAMETER
Total Harmonic Distortion
The
●
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25∞C. MUXOUT connected to ADC inputs. (Note 5)
CONDITIONS
1kHz Input Signal,
First Five Harmonics
1kHz Input Signal
1kHz Input Signal
MIN
LTC1854
TYP MAX
74
–102
–99
–120
1
–70
60
Full-Scale Step
(Note 9)
(Note 12)
150
4
150
MIN
LTC1855
TYP MAX
83
–95
–99
–120
1
–70
60
4
150
MIN
LTC1856
TYP MAX
87
–101
–103
–120
1
–70
60
4
UNITS
dB
dB
dB
dB
MHz
ns
ps
ms
ns
S/(N + D) Signal-to-(Noise + Distortion) Ratio 1kHz Input Signal
Peak Harmonic or Spurious Noise
Channel-to-Channel Isolation
–3dB Input Bandwidth
Aperture Delay
Aperture Jitter
Transient Response
Overvoltage Recovery
U
W U
U
MIN
TYP
±10
ADC
–
±2.048
31
5
5
12
4
MAX
UNITS
V
V
kW
kW
pF
pF
pF
±1
mA
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LTC1854/LTC1855/LTC1856
The
●
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T
A
= 25∞C. (Note 5)
PARAMETER
V
REF
Output Voltage
V
REF
Output Temperature Coefficient
V
REF
Output Impedance
V
REFCOMP
Output Voltage
CONDITIONS
I
OUT
= 0
I
OUT
= 0
–0.1mA
£
I
OUT
£
0.1mA
I
OUT
= 0
●
I TER AL REFERE CE CHARACTERISTICS
DIGITAL I PUTS A D DIGITAL OUTPUTS
SYMBOL
V
IH
V
IL
I
IN
C
IN
V
OH
V
OL
I
OZ
C
OZ
I
SOURCE
I
SINK
PARAMETER
High Level Input Voltage
Low Level Input Voltage
Digital Input Current
Digital Input Capacitance
High Level Output Voltage
Low Level Output Voltage
Hi-Z Output Leakage
Hi-Z Output Capacitance
Output Source Current
Output Sink Current
CONDITIONS
V
DD
= 5.25V
V
DD
= 4.75V
V
IN
= 0V to V
DD
The
●
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T
A
= 25∞C. (Note 5)
MIN
●
●
●
POWER REQUIRE E TS
PARAMETER
Positive Supply Voltage
Positive Supply Current
Nap Mode
Sleep Mode
Power Dissipation
Nap Mode
Sleep Mode
The
●
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25∞C. (Note 5)
CONDITIONS
(Notes 9 and 10)
●
4
U W
U
U
U
U
U
MIN
2.475
TYP
2.50
±10
8
4.096
MAX
2.525
UNITS
V
ppm/∞C
kW
V
TYP
MAX
0.8
±10
UNITS
V
V
mA
pF
V
V
2.4
5
V
DD
= 4.75V, I
O
= –10mA, OV
DD
= V
DD
V
DD
= 4.75V, I
O
= –200mA, OV
DD
= V
DD
V
DD
= 4.75V, I
O
= 160mA, OV
DD
= V
DD
V
DD
= 4.75V, I
O
= 1.6mA, OV
DD
= V
DD
V
OUT
= 0V to V
DD
, RD = High
RD = High
V
OUT
= 0V
V
OUT
= V
DD
4.74
●
●
●
4
0.05
0.10
15
–10
10
0.4
±10
V
V
mA
pF
mA
mA
MIN
4.75
TYP
5.00
8.0
5.5
8.0
40.0
27.5
40.0
MAX
5.25
12
7
13
UNITS
V
mA
mA
mA
mW
mW
mW
CONVST = 0V or 5V
CONVST = 0V or 5V
185456fa
LTC1854/LTC1855/LTC1856
TI I G CHARACTERISTICS
SYMBOL
PARAMETER
f
SAMPLE(MAX)
Maximum Sampling Frequency
t
CONV
t
ACQ
f
SCK
t
r
t
f
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
10
t
11
t
12
t
13
Conversion Time
Acquisition Time
SCK Frequency
SDO Rise Time
SDO Fall Time
CONVST High Time
CONVST to BUSY Delay
SCK Period
SCK High
SCK Low
Delay Time, SCKØ to SDO Valid
Time from Previous SDO Data Remains
Valid After SCKØ
SDO Valid After RDØ
RDØ to SCK Setup Time
SDI Setup Time Before SCK≠
SDI Hold Time After SCK≠
SDO Valid Before BUSY≠
Bus Relinquish Time
RD = Low, C
L
= 25pF, See Test Circuits
See Test Circuits
C
L
= 25pF, See Test Circuits
C
L
= 25pF, See Test Circuits
C
L
= 25pF, See Test Circuits
C
L
= 25pF, See Test Circuits
Through CH0 to CH7 Inputs
Through ADC
+
, ADC
–
Only
(Note 13)
See Test Circuits
See Test Circuits
●
●
●
●
●
●
●
●
●
●
●
●
●
The
●
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25∞C. (Note 5)
CONDITIONS
Through CH0 to CH7 Inputs
Through ADC
+
, ADC
–
Only
●
●
●
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All voltage values are with respect to ground with DGND, AGND1,
AGND2 and AGND3 wired together unless otherwise noted.
Note 3:
When these pin voltages are taken below ground or above AV
DD
=
DV
DD
= OV
DD
= V
DD
, they will be clamped by internal diodes. This product
can handle currents of greater than 100mA below ground or above V
DD
without latchup.
Note 4:
When these pin voltages are taken below ground they will be
clamped by internal diodes. This product can handle currents of greater
than 100mA below ground without latchup. These pins are not clamped
to V
DD
.
Note 5:
V
DD
= 5V, f
SAMPLE
= 100kHz, t
r
= t
f
= 5ns unless otherwise
specified.
Note 6:
Linearity, offset and full-scale specifications apply for a single-
ended analog MUX input with respect to ground or ADC
+
with respect to
ADC
–
tied to ground.
UW
MIN
100
TYP
166
4
1
MAX
UNITS
kHz
kHz
5
4
ms
ms
ms
MHz
ns
ns
ns
●
0
6
6
40
15
50
10
10
25
5
20
11
20
0
7
5
20
10
20
30
ns
ns
ns
ns
45
ns
ns
30
ns
ns
ns
ns
ns
30
ns
Note 7:
Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual end points of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 8:
Bipolar zero error is the offset voltage measured from – 0.5LSB
when the output code flickers between 0000 0000 0000 0000 and 1111
1111 1111 1111 for the LTC1856, between 00 0000 0000 0000 and 11
1111 1111 1111 for the LTC1855 and between 0000 0000 0000 and 1111
1111 1111 for the LTC1854.
Note 9:
Guaranteed by design, not subject to test.
Note 10:
Recommended operating conditions.
Note 11:
Full-scale bipolar error is the worst case of –FS or +FS
untrimmed deviation from ideal first and last code transitions, divided by
the full-scale range, and includes the effect of offset error.
Note 12:
Recovers to specified performance after (2 • FS) input
overvoltage.
Note 13:
t
6
of 45ns maximum allows f
SCK
up to 10MHz for rising capture
with 50% duty cycle and f
SCK
up to 20MHz for falling capture (with 5ns
setup time for the receiving logic).
185456fa
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