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TN2524ND

产品描述N-channel enhancement-mode vertical dmos fets
产品类别分立半导体    晶体管   
文件大小474KB,共4页
制造商Supertex
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TN2524ND概述

N-channel enhancement-mode vertical dmos fets

TN2524ND规格参数

参数名称属性值
是否无铅含铅
是否Rohs认证不符合
零件包装代码DIE
包装说明UNCASED CHIP, X-XUUC-N
Reach Compliance Codecompliant
ECCN代码EAR99
其他特性LOGIC LEVEL COMPATIBLE, HIGH INPUT IMPEDANCE, LOW THRESHOLD
配置SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压240 V
最大漏源导通电阻6 Ω
FET 技术METAL-OXIDE SEMICONDUCTOR
最大反馈电容 (Crss)25 pF
JESD-30 代码X-XUUC-N
JESD-609代码e0
元件数量1
端子数量3
工作模式ENHANCEMENT MODE
最高工作温度150 °C
封装主体材料UNSPECIFIED
封装形状UNSPECIFIED
封装形式UNCASED CHIP
峰值回流温度(摄氏度)NOT SPECIFIED
极性/信道类型N-CHANNEL
认证状态Not Qualified
表面贴装YES
端子面层TIN LEAD
端子形式NO LEAD
端子位置UPPER
处于峰值回流温度下的最长时间NOT SPECIFIED
晶体管应用SWITCHING
晶体管元件材料SILICON
Base Number Matches1

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TN2524
Low Threshold
N-Channel Enhancement-Mode
Vertical DMOS FETs
Ordering Information
BV
DSS
/
BV
DGS
240V
*
Same as SOT-89.
R
DS(ON)
(max)
6.0Ω
V
GS(th)
(max)
2.0V
I
D(ON)
(min)
1.0A
Order Number / Package
TO-243AA*
TN2524N8
Die
TN2524ND
Product supplied on 2000 piece carrier tape reels.
† MIL visual screening available.
Product marking for TO-243AA
TN5C❋
Features
Low threshold — 2.0V max.
High input impedance
Low input capacitance — 125pF max.
Fast switching speeds
Low on resistance
Free from secondary breakdown
Low input and output leakage
Complementary N- and P-channel devices
Where
= 2-week alpha date code
Low Threshold DMOS Technology
These low threshold enhancement-mode (normally-off) transis-
tors utilize a vertical DMOS structure and Supertex's well-proven
silicon-gate manufacturing process. This combination produces
devices with the power handling capabilities of bipolar transis-
tors and with the high input impedance and positive temperature
coefficient inherent in MOS devices. Characteristic of all MOS
structures, these devices are free from thermal runaway and
thermally induced secondary breakdown.
Supertex vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where very low threshold
voltage, high breakdown voltage, high input impedance, low input
capacitance, and fast switching speeds are desired.
Applications
Logic level interfaces – ideal for TTL and CMOS
Solid state relays
Battery operated systems
Photo voltaic drives
Analog switches
General purpose line drivers
Telecom switches
Package Option
D
G
D
S
Absolute Maximum Ratings
Drain-to-Source Voltage
Drain-to-Gate Voltage
Gate-to-Source Voltage
Operating and Storage Temperature
Soldering Temperature*
*
Distance of 1.6 mm from case for 10 seconds.
11/12/01
BV
DSS
BV
DGS
±
20V
-55°C to +150°C
300°C
TO-243AA
(SOT-89)
Note: See Package Outline section for dimensions.
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
1

TN2524ND相似产品对比

TN2524ND TN2524 TN2524N8
描述 N-channel enhancement-mode vertical dmos fets N-channel enhancement-mode vertical dmos fets N-channel enhancement-mode vertical dmos fets
是否Rohs认证 不符合 - 不符合
零件包装代码 DIE - SOT-89
包装说明 UNCASED CHIP, X-XUUC-N - SAME AS SOT-89, 3 PIN
Reach Compliance Code compliant - unknown
ECCN代码 EAR99 - EAR99
其他特性 LOGIC LEVEL COMPATIBLE, HIGH INPUT IMPEDANCE, LOW THRESHOLD - LOGIC LEVEL COMPATIBLE
配置 SINGLE WITH BUILT-IN DIODE - SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压 240 V - 240 V
最大漏源导通电阻 6 Ω - 6 Ω
FET 技术 METAL-OXIDE SEMICONDUCTOR - METAL-OXIDE SEMICONDUCTOR
最大反馈电容 (Crss) 25 pF - 25 pF
JESD-30 代码 X-XUUC-N - R-PSSO-F3
JESD-609代码 e0 - e0
元件数量 1 - 1
端子数量 3 - 3
工作模式 ENHANCEMENT MODE - ENHANCEMENT MODE
最高工作温度 150 °C - 150 °C
封装主体材料 UNSPECIFIED - PLASTIC/EPOXY
封装形状 UNSPECIFIED - RECTANGULAR
封装形式 UNCASED CHIP - SMALL OUTLINE
峰值回流温度(摄氏度) NOT SPECIFIED - NOT SPECIFIED
极性/信道类型 N-CHANNEL - N-CHANNEL
认证状态 Not Qualified - Not Qualified
表面贴装 YES - YES
端子面层 TIN LEAD - Tin/Lead (Sn/Pb)
端子形式 NO LEAD - FLAT
端子位置 UPPER - SINGLE
处于峰值回流温度下的最长时间 NOT SPECIFIED - NOT SPECIFIED
晶体管应用 SWITCHING - SWITCHING
晶体管元件材料 SILICON - SILICON

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