ATtiny1614/1616/1617
Automotive
tinyAVR
®
1-series
Introduction
The ATtiny1614/1616/1617 Automotive are members of the tinyAVR
®
1-series of microcontrollers, using
the AVR
®
processor with hardware multiplier, running at up to 16 MHz, with 16 KB Flash, 2 KB of SRAM,
and 256 bytes of EEPROM in a 14-, 20-, or 24-pin package. The tinyAVR
®
1-series uses the latest
technologies with a flexible, low-power architecture including Event System and SleepWalking, accurate
analog features, and Core Independent Peripherals. Capacitive touch interfaces with driven shield are
supported with the integrated QTouch
®
peripheral touch controller.
Features
• CPU
– AVR
®
CPU
– Running at up to 16 MHz
– Single-cycle I/O access
– Two-level interrupt controller
– Two-cycle hardware multiplier
• Memories
– 16 KB In-system self-programmable Flash memory
– 256 bytes EEPROM
– 2 KB SRAM
– Write/erase endurance:
• Flash 10,000 cycles
• EEPROM 100,000 cycles
– Data retention:
• 40 years at 55°C
• System
– Power-on Reset (POR)
– Brown-out Detector (BOD)
– Clock options:
• 16 MHz low-power internal RC oscillator
• 32.768 kHz Ultra Low-Power (ULP) internal RC oscillator
• 32.768 kHz external crystal oscillator
• External clock input
– Single-pin Unified Program and Debug Interface (UPDI)
– Three sleep modes:
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2019 Microchip Technology Inc.
Complete Datasheet
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ATtiny1614/1616/1617 Automotive
• Idle with all peripherals running for immediate wake-up
• Standby
– Configurable operation of selected peripherals
– SleepWalking peripherals
• Power-Down with full data retention
• Peripherals
– One 16-bit Timer/Counter type A (TCA) with dedicated period register and three compare
channels
– Two 16-bit Timer/Counter type B (TCB) with input capture
– One 12-bit Timer/Counter type D (TCD) optimized for control applications
– One 16-bit Real-Time Counter (RTC) running from an external crystal, external clock, or internal
RC oscillator
– Watchdog Timer (WDT) with Window mode, with a separate on-chip oscillator
– One USART with fractional baud rate generator, auto-baud, and start-of-frame detection
– One master/slave Serial Peripheral Interface (SPI)
– One Two-Wire Interface (TWI) with dual address match
• Philips I
2
C compatible
• Standard mode (Sm, 100 kHz)
• Fast mode (Fm, 400 kHz)
• Fast mode plus (Fm+, 1 MHz)
– Three Analog Comparators (AC) with low propagation delay
– Two 10-bit 115 ksps Analog-to-Digital Converters (ADC)
– Three 8-bit Digital-to-Analog Converters (DAC) with one external channel
– Multiple voltage references (VREF):
• 0.55V
• 1.1V
• 1.5V
• 2.5V
• 4.3V
– Event System (EVSYS) for CPU independent and predictable inter-peripheral signaling
– Configurable Custom Logic (CCL) with two programmable look-up tables
– Automated CRC memory scan
– Peripheral Touch Controller (PTC)
• Capacitive touch buttons, sliders, wheels and 2D surfaces
• Wake-up on touch
• Driven shield for improved moisture and noise handling performance
• Up to 13 self capacitance channels
• Up to 42 mutual capacitance channels
– External interrupt on all general purpose pins
• I/O and Packages:
– 12/18/21 programmable I/O lines
– 14-pin SOIC150
– 20-pin VQFN 3x3 mm with wettable flanks
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2019 Microchip Technology Inc.
Complete Datasheet
DS40002021C-page 2
ATtiny1614/1616/1617 Automotive
– 20-pin SOIC300
– 24-pin VQFN 4x4 mm with wettable flanks
• Temperature Ranges:
– -40°C to 105°C
– -40°C to 125°C
• Speed Grades:
– 0-8 MHz @ 2.7V – 5.5V
– 0-16 MHz @ 4.5V – 5.5V
©
2019 Microchip Technology Inc.
Complete Datasheet
DS40002021C-page 3
ATtiny1614/1616/1617 Automotive
Table of Contents
Introduction......................................................................................................................1
Features.......................................................................................................................... 1
1. Silicon Errata and Data Sheet Clarification Document............................................ 11
2. tinyAVR
®
1-series Overview.................................................................................... 12
2.1.
Configuration Summary..............................................................................................................12
3. Block Diagram......................................................................................................... 14
4. Pinout...................................................................................................................... 16
4.1.
4.2.
4.3.
4.4.
14-Pin SOIC............................................................................................................................... 16
20-Pin SOIC............................................................................................................................... 17
20-Pin VQFN.............................................................................................................................. 18
24-Pin VQFN.............................................................................................................................. 19
5. I/O Multiplexing and Considerations........................................................................20
5.1.
Multiplexed Signals.................................................................................................................... 20
6. Automotive Quality Grade....................................................................................... 21
7. Memories.................................................................................................................22
7.1.
7.2.
7.3.
7.4.
7.5.
7.6.
7.7.
7.8.
7.9.
7.10.
Overview.................................................................................................................................... 22
Memory Map.............................................................................................................................. 23
In-System Reprogrammable Flash Program Memory................................................................23
SRAM Data Memory.................................................................................................................. 24
EEPROM Data Memory............................................................................................................. 24
User Row....................................................................................................................................24
Signature Bytes.......................................................................................................................... 25
I/O Memory.................................................................................................................................25
Memory Section Access from CPU and UPDI on Locked Device..............................................26
Configuration and User Fuses (FUSE).......................................................................................27
8. Peripherals and Architecture................................................................................... 43
8.1.
8.2.
8.3.
Peripheral Module Address Map................................................................................................ 43
Interrupt Vector Mapping............................................................................................................ 44
System Configuration (SYSCFG)...............................................................................................46
9. AVR CPU................................................................................................................. 49
9.1.
9.2.
9.3.
9.4.
9.5.
9.6.
Features..................................................................................................................................... 49
Overview.................................................................................................................................... 49
Architecture................................................................................................................................ 49
Arithmetic Logic Unit (ALU)........................................................................................................ 51
Functional Description................................................................................................................52
Register Summary - CPU...........................................................................................................57
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ATtiny1614/1616/1617 Automotive
9.7.
Register Description................................................................................................................... 57
10. Nonvolatile Memory Controller (NVMCTRL)........................................................... 61
10.1.
10.2.
10.3.
10.4.
10.5.
Features..................................................................................................................................... 61
Overview.................................................................................................................................... 61
Functional Description................................................................................................................62
Register Summary - NVMCTRL................................................................................................. 69
Register Description................................................................................................................... 69
11. Clock Controller (CLKCTRL)................................................................................... 77
11.1.
11.2.
11.3.
11.4.
11.5.
Features..................................................................................................................................... 77
Overview.................................................................................................................................... 77
Functional Description................................................................................................................79
Register Summary - CLKCTRL.................................................................................................. 84
Register Description................................................................................................................... 84
12. Sleep Controller (SLPCTRL)................................................................................... 94
12.1.
12.2.
12.3.
12.4.
12.5.
Features..................................................................................................................................... 94
Overview.................................................................................................................................... 94
Functional Description................................................................................................................95
Register Summary - SLPCTRL.................................................................................................. 98
Register Description................................................................................................................... 98
13. Reset Controller (RSTCTRL).................................................................................100
13.1.
13.2.
13.3.
13.4.
13.5.
Features................................................................................................................................... 100
Overview.................................................................................................................................. 100
Functional Description..............................................................................................................101
Register Summary - RSTCTRL................................................................................................104
Register Description................................................................................................................. 104
14. CPU Interrupt Controller (CPUINT)....................................................................... 107
14.1.
14.2.
14.3.
14.4.
14.5.
Features................................................................................................................................... 107
Overview.................................................................................................................................. 107
Functional Description..............................................................................................................109
Register Summary - CPUINT................................................................................................... 116
Register Description................................................................................................................. 116
15. Event System (EVSYS)......................................................................................... 121
15.1.
15.2.
15.3.
15.4.
15.5.
Features................................................................................................................................... 121
Overview.................................................................................................................................. 121
Functional Description..............................................................................................................124
Register Summary - EVSYS.................................................................................................... 126
Register Description................................................................................................................. 126
16. Port Multiplexer (PORTMUX)................................................................................ 135
16.1. Overview.................................................................................................................................. 135
16.2. Register Summary - PORTMUX.............................................................................................. 136
16.3. Register Description................................................................................................................. 136
©
2019 Microchip Technology Inc.
Complete Datasheet
DS40002021C-page 5