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PIC32MK0256GPG048T-I/Y8X

产品描述MIPS32® microAptiv™ series 微控制器 IC 32-位 120MHz 256KB(256K x 8) 闪存 48-TQFP(7x7)
产品类别半导体    嵌入式处理器和控制器   
制造商Microchip(微芯科技)
官网地址https://www.microchip.com
标准
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PIC32MK0256GPG048T-I/Y8X概述

MIPS32® microAptiv™ series 微控制器 IC 32-位 120MHz 256KB(256K x 8) 闪存 48-TQFP(7x7)

PIC32MK0256GPG048T-I/Y8X规格参数

参数名称属性值
类别
厂商名称Microchip(微芯科技)
系列PIC® 32MK
包装卷带(TR)
核心处理器MIPS32® microAptiv™
内核规格32-位
速度120MHz
连接能力I²C,IrDA,LINbus,SPI,UART/USART
外设欠压检测/复位,DMA,I²S,POR,PWM,WDT
I/O 数37
程序存储容量256KB(256K x 8)
程序存储器类型闪存
RAM 大小64K x 8
电压 - 供电 (Vcc/Vdd)2.3V ~ 3.6V
数据转换器A/D 18x12b; D/A 2x12b
振荡器类型内部
工作温度-40°C ~ 85°C(TA)
安装类型表面贴装型
封装/外壳48-TQFP
供应商器件封装48-TQFP(7x7)
基本产品编号PIC32MK0256GPG048

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PIC32MK GENERAL PURPOSE AND
MOTOR CONTROL (GPG/MCJ)
WITH CAN FD FAMILY
32-bit General Purpose and Motor Control Application MCUs with
CAN FD, FPU, ECC Flash, and up to 512 KB Flash, 64 KB SRAM, and
Op amps
Operating Conditions: 2.3V to 3.6V
• -40ºC to +85ºC, DC to 120 MHz
• -40ºC to +125ºC, DC to 80 MHz
Security Features
• Advanced Memory Protection:
- Peripheral and memory region access control
Core: 120 MHz (up to 198 DMIPS)
microAptiv™ MCU core with Floating Point Unit
• microMIPS™ mode for up to 40% smaller code size
• DSP-enhanced core:
- Four 64-bit accumulators
- Single-cycle MAC, saturating and fractional math
• Code-efficient (C and Assembly) architecture
• Two 32-bit core register files to reduce interrupt latency
MIPS32
®
Advanced Analog Features
• 12-bit ADC module:
- Sum of all individual ADCs combined, 25.45 Msps 12-bit
mode or 33.79 Msps 8-bit mode
- 7 individual ADC modules
- 3.75 Msps per S&H with dedicated DMA
- Up to 30 analog inputs
• Flexible and independent ADC trigger sources
• Four high bandwidth op-amps and five comparators
• Up to two 12-bit CDACs
• Internal temperature sensor ±2ºC accuracy
• Capacitive Touch Divider (CVD)
Clock Management
• 8 MHz ±4% (FRC) internal oscillator -40ºC to +85ºC
• Programmable PLLs and oscillator clock sources:
- HS and EC clock modes
• 32 kHz Internal Low-power RC oscillator (LPRC)
• Independent external low-power 32 kHz crystal oscillator
• Fail-Safe Clock Monitor (FSCM)
• Independent Watchdog Timers (WDT) and Deadman Timer
(DMT)
• Fast wake-up and start-up
• Four Fractional clock out (REFCLKO) modules
Communication Interfaces
• CAN Flexible Data-Rate (CAN FD) module (with dedicated DMA
channels):
- 2.0B Active with DeviceNet™ addressing support
- ISO 11898-1:2015 compliant
• Up to two UART modules (up to 25 Mbps):
- Supports LIN 2.1 and IrDA
®
protocols
• Two SPI/I
2
S modules (SPI 50 Mbps)
• Two I
2
C modules (up to 1 Mbaud) with SMBus support
• Peripheral Pin Select (PPS) to enable remappable pin functions
Power Management
• Low-power management modes (Sleep, and Idle)
• Integrated:
- Power-on Reset (POR) and Brown-out Reset (BOR)
- Programmable High/Low Voltage Detect (HLVD)
• On-board capacitorless regulator
Timers/Output Compare/Input Capture/RTCC
• Up to nine 16-bit or one 16-bit and eight 32-bit timers/counters
for GP and MC devices and two additional QEI 32-bit timers for
MC devices
• 9 Output Compare (OC) modules
• 9 Input Capture (IC) modules
• PPS to enable function remap
• Real-Time Clock and Calendar (RTCC) module
Motor Control PWM
Up to nine PWM pairs
Leading-edge and Trailing-edge blanking
Dead Time for rising and falling edges
Dead Time Compensation
8.33 ns PWM Resolution
Clock Chopping for High-Frequency Operation
PWM Support for:
- DC/DC, AC/DC, inverters, PFC, lighting
- BLDC, PMSM, ACIM, SRM motors
• Choice of 10 Fault and 9 Current Limit Inputs
• Flexible Trigger Configuration for ADC Triggering
Input/Output
5V-tolerant pins with up to 22 mA source/sink
Selectable internal open drain, pull-ups, and pull-downs
External interrupts on all I/O pins
Five programmable edge/level-triggered interrupt pins
Motor Encoder Interface
• Three Quadrature Encoder Interface (QEI) modules:
- Four inputs: Phase A, Phase B, Home, and Index
Qualification and Class B Support
Class B Safety Library, IEC 60730 (planned)
Back-up internal oscillator
Clock monitor with back-up internal oscillator
Global register locking
Audio/Graphics/Touch Interfaces
• Up to two I
2
S audio data communication interfaces
• Up to two SPI control interfaces
• Programmable master clock:
- Generation of fractional clock frequencies
- Can be tuned in run-time
Debugger Development Support
In-circuit and in-application programming
2-wire or 4-wire MIPS
®
Enhanced JTAG interface
Unlimited software and 12 complex breakpoints
IEEE 1149.2-compatible (JTAG) boundary scan
Non-intrusive hardware-based instruction trace
Unique Features
• Permanent non-volatile 4-word unique device serial number
• Flash Error Code Correction (ECC)
Software and Tools Support
C/C++ compiler with native DSP/fractional support
MPLAB
®
Harmony Integrated Software Framework
TCP/IP, Graphics, and mTouch™ middleware
MFi, Android™ and Bluetooth
®
audio frameworks
RTOS Kernels: Express Logic ThreadX, FreeRTOS™,
OPENRTOS
®
, Micriµm
®
µC/OS™, and SEGGER embOS
®
Direct Memory Access (DMA)
• Up to eight channels with automatic data size detection
• Programmable Cyclic Redundancy Check (CRC)
• Up to 64 KB transfers
2019-2020 Microchip Technology Inc.
DS60001570C -page 1
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