LTC1390
8-Channel
Analog Multiplexer
with Serial Interface
FEATURES
s
s
DESCRIPTIO
s
s
s
s
s
s
s
s
s
3-Wire Serial Digital Interface
Data Retransmission Allows Series Connection
with Serial A/D Converters
Single 3V to
±5V
Supply Operation
Analog Inputs May Extend to Supply Rails
Low Charge Injection
Low R
ON
: 75Ω Max
Low Leakage:
±5nA
Max
Guaranteed Break-Before-Make
TTL/CMOS Compatible for All Digital Inputs
Cascadable to Allow Additional Channels
Can Be Used as a Demultiplexer
The LTC
®
1390 is a high performance CMOS 8-to-1 analog
multiplexer. It features a 3-wire digital interface with a
bidirectional data retransmission feature, allowing it to be
wired in series with a serial A/D converter while using only
one serial port. The interface also allows several LTC1390s
to be wired in series or parallel, increasing the number of
MUX channels available using only a single digital port. All
the above features are also valid when LTC1390 operates
as a demultiplexer such as with a D/A converter.
The LTC1390 features a typical R
ON
of 45Ω, typical switch
leakage of 50pA, and guaranteed break-before-make op-
eration. Charge injection is
±10pC
maximum. All digital
inputs are TTL and CMOS compatible when operated from
single or dual supplies. The inputs can withstand 100mA
fault currents.
The LTC1390 is available in 16-pin PDIP and narrow SO
packages.
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATI
s
s
s
S
Data Acquisition Systems
Communication Systems
Signal Multiplexing/Demultiplexing
TYPICAL APPLICATI
V
CC
V
EE
V
CC
1
2
3
4
ANALOG
INPUTS
5
6
7
8
3-WIRE
SERIAL
INTERFACE
TO MUX AND ADC
16
V
+
LTC1390
D
15
14
V
–
13
12
11
10
9
V
CC
47k
DATA
CLK
CS
OPTIONAL A/D
INPUT FILTER
1
2
3
8
7
S0
S1
S2
S3
S4
S5
S6
S7
CS
+IN
V
CC
CLK
DATA 2
DATA 1
CS
CLK
GND
ON-RESISTANCE (Ω)
LTC1096
6
D
OUT
–IN
4
5
GND
V
REF
LTC1390 • TA01
U
ON-Resistance vs
Analog Input Voltage
250
T
A
= 25°C
200
V
+
= 3V
V
–
= 0V
150
100
V
+
= 5V
V
–
= – 5V
50
0
–5 –4 –3 –2 –1 0 1 2 3 4
ANALOG INPUT VOLTAGE, V
S
(V)
5
LTC1390 • TA02
UO
UO
sn1390 1390fs
1
LTC1390
ABSOLUTE
(Note 1)
AXI U
RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW
S0
S1
S2
S3
S4
S5
S6
S7
1
2
3
4
5
6
7
8
16 V
+
15 D
14 V
–
13 DATA 2
12 DATA 1
11 CS
10 CLK
9
GND
Total Supply Voltage (V
+
to V
–
) .............................. 15V
Input Voltage
Analog Inputs ........................ V
–
– 0.3V to V
+
+ 0.3V
Digital Inputs ........................................ – 0.3V to 15V
Digital Outputs ........................... – 0.3V to V
+
+ 0.3V
Power Dissipation ............................................. 500mW
Operating Temperature Range ..................... 0°C to 70°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
ORDER PART
NUMBER
LTC1390CN
LTC1390CS
N PACKAGE
16-LEAD PDIP
S PACKAGE
16-LEAD PLASTIC SO
T
JMAX
= 150°C,
θ
JA
= 70°C/ W (N)
T
JMAX
= 150°C,
θ
JA
= 100°C/ W (S)
Consult factory for Industrial and Military grade parts.
ELECTRICAL CHARACTERISTICS
V
+
= 5V, V
–
= – 5V, GND = 0V, T
A
= operating temperature unless otherwise noted.
SYMBOL
Switch
V
ANALOG
R
ON
Analog Signal Range
On Resistance
(Note 2)
V
S
=
±3.5V,
I
D
= 1mA
T
MIN
25°C
T
MAX
q
PARAMETER
CONDITIONS
MIN
–5
TYP
MAX
5
75
75
120
UNITS
V
Ω
Ω
Ω
%
%/°C
45
20
0.5
∆R
ON
vs V
S
∆R
ON
vs Temperature
I
S(OFF)
I
D(OFF)
I
D(ON)
Input
V
INH
V
INL
I
INL
, I
INH
V
OH
V
OL
High Level Input Voltage
Low Level Input Voltage
Low or High Level Current
High Level Output Voltage
Low Level Output Voltage
V
+
= 5.25V
V
+
= 4.75V
V
IN
= 5V, V
IN
= 0V
V
+
= 4.75V, I
O
= 10µA
V
+
= 4.75V, I
O
= 360µA
V
+
= 4.75V, I
O
= 0.5mA
q
q
q
q
q
Off Input Leakage
Off Output Leakage
On Channel Leakage
V
S
= 4V, V
D
= – 4V; V
S
= – 4V, V
D
= 4V
Channel Off
V
S
= 4V, V
D
= – 4V; V
S
= – 4V, V
D
= 4V
Channel Off
V
S
= V
D
=
±4V
Channel On
0.05
q
±5
±50
±5
±50
±5
±50
0.05
q
0.05
q
2.4
0.8
±1
2.4
4.74
4.50
0.16
0.8
sn1390 1390fs
2
U
nA
nA
nA
nA
nA
nA
V
V
µA
V
V
V
W
U
U
W W
W
LTC1390
ELECTRICAL CHARACTERISTICS
V
+
= 5V, V
–
= – 5V, GND = 0V, T
A
= operating temperature unless otherwise noted.
SYMBOL
Dynamic
f
CLK
t
ON
t
OFF
t
OPEN
OIRR
O
INJ
C
S(OFF)
C
D(OFF)
Supply
I
+
I
–
Positive Supply Current
Negative Supply Current
All Logic Inputs Tied Together, V
IN
= 0V or V
IN
= 5V
All Logic Inputs Tied Together, V
IN
= 0V or V
IN
= 5V
q
q
PARAMETER
Clock Frequency
Enable Turn-On Time
Enable Turn-Off Time
Break-Before-Make Interval
Off Isolation
Charge Injection
Source Off Capacitance
Drain Off Capacitance
CONDITIONS
MIN
TYP
MAX
5
UNITS
MHz
ns
ns
ns
dB
V
S
= 2.5V, R
L
= 1k, C
L
= 35pF
V
S
= 2.5V, R
L
= 1k, C
L
= 35pF
35
V
S
= 2V
P-P
, R
L
= 1k, f = 100kHz
R
S
= 0, C
L
= 1000pF, V
S
= 1V (Note 2)
260
100
155
70
±2
5
10
15
15
400
200
±10
pC
pF
pF
40
40
µA
µA
V
+
= 3V, V
–
= GND = 0V, T
A
= operating temperature unless otherwise noted.
SYMBOL
Switch
V
ANALOG
R
ON
Analog Signal Range
On Resistance
(Note 2)
V
S
= 1.2V, I
D
= 1mA
T
MIN
25°C
T
MAX
q
PARAMETER
CONDITIONS
MIN
0
TYP
MAX
3
255
255
300
UNITS
V
Ω
Ω
Ω
%
%/°C
200
20
0.5
∆R
ON
vs V
S
∆R
ON
vs Temperature
I
S(OFF)
I
D(OFF)
I
D(ON)
Input
V
INH
V
INL
I
INL
, I
INH
V
OH
V
OL
High Level Input Voltage
Low Level Input Voltage
Low or High Level Current
High Level Output Voltage
Low Level Output Voltage
V
+
= 3.3V
V
+
= 2.7V
V
IN
= 3V, V
IN
= 0V
V
+
= 2.7V, I
O
= 20µA
V
+
= 2.7V, I
O
= 400µA
V
+
= 2.7V, I
O
= 20µA
V
+
= 2.7V, I
O
= 300µA
q
q
q
q
q
Off Input Leakage
Off Output Leakage
On Channel Leakage
V
S
= 2.5V, V
D
= 0.5V; V
S
= 0.5V, V
D
= 2.5V (Note 3)
Channel Off
V
S
= 2.5V, V
D
= 0.5V; V
S
= 0.5V, V
D
= 2.5V (Note 3)
Channel Off
V
S
= V
D
= 0.5V, V
S
= V
D
= 2.5V (Note 3)
Channel On
±0.05
q
±5
±50
±5
±50
±5
±50
nA
nA
nA
nA
nA
nA
V
±0.05
q
±0.05
q
2.4
0.8
±1
2
2.68
2.27
0.01
0.15
0.8
V
µA
V
V
V
V
sn1390 1390fs
3
LTC1390
ELECTRICAL CHARACTERISTICS
V
+
= 3V, V
–
= GND = 0V, T
A
= operating temperature unless otherwise noted.
SYMBOL
Dynamic
f
CLK
t
ON
t
OFF
t
OPEN
OIRR
O
INJ
C
S(OFF)
C
D(OFF)
Supply
I
+
Positive Supply Current
All Logic Inputs Tied Together, V
IN
= 0V or V
IN
= 3V
q
PARAMETER
Clock Frequency
Enable Turn-On Time
Enable Turn-Off Time
Break-Before-Make Interval
Off Isolation
Charge Injection
Source Off Capacitance
Drain Off Capacitance
CONDITIONS
MIN
TYP
MAX
5
UNITS
MHz
ns
ns
ns
dB
V
S
= 1.5V, R
L
= 1k, C
L
= 35pF (Note 4)
V
S
= 1.5V, R
L
= 1k, C
L
= 35pF (Note 4)
(Note 4)
V
S
= 2V
P-P
, R
L
= 1k, f = 100kHz
R
S
= 0, C
L
= 1000pF, V
S
= 1V (Note 2)
125
490
190
290
70
±1
5
10
0.2
700
300
±5
pC
pF
pF
2
µA
The
q
denotes specifications which apply over the full operating
temperature range.
Note 1:
Absolute maximum ratings are those beyond which the safety of
the device may be impaired.
Note 2:
Guaranteed by design.
Note 3:
Leakage current with a single 3V supply is guaranteed by
correlation with the leakage current of the
±5V
supply.
Note 4:
Timing specifications with a single 3V supply is guaranteed by
correlation with the timing specifications of the
±5V
supply.
TYPICAL PERFORMANCE CHARACTERISTICS
ON-Resistance vs Temperature
300
250
ON-RESISTANCE (Ω)
200
150
100
50
0
0
10
40
30
50
20
TEMPERATURE (˚C)
60
70
V
+
= 5V
–
= – 5V
V
+
= 3V
V
–
= 0V
V
S
= 1.2V
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
V
V
S
= 0V
PIN FUNCTIONS
S0 to S7 (Pins 1 to 8):
Analog Multiplexer Inputs/Analog
Demultiplexer Outputs.
GND (Pin 9):
Digital Ground. Connect to system ground.
CLK (Pin 10):
System Clock (TTL/CMOS Compatible). The
clock synchronizes the channel selection bits and the
serial data transfer from Data 1 to Data 2.
sn1390 1390fs
4
U W
LTC1390 • G01
Driver Output Low Voltage
vs Output Current
6
5
4
DATA 1
3
2
DATA 2
1
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
OUTPUT VOLTAGE (V)
LTC1390 • G02
Driver Output High Voltage
vs Output Current
0
–1
–2
–3
–4
DATA 1
–5
–6
–7
2.0
T
A
= 25°C
V
+
= 5V
V
–
= –5V
DATA 2
T
A
= 25°C
V
+
= 5V
V
–
= –5V
2.5
4.0
3.5
3.0
OUTPUT VOLTAGE (V)
4.5
5.0
LTC1390 • G03
U
U
U
LTC1390
PIN FUNCTIONS
CS (Pin 11):
Chip Select Input (TTL/CMOS Compatible). A
logic high on this input enables LTC1390 to read in the
channel selection bits and allow data transfer from Data 1
to Data 2. A logic low enables the desired channel for
analog signal transmission and allows data transfer from
Data 2 to Data 1.
Data 1 (Pin 12):
Bidirectional Digital Input/Output (TTL/
CMOS Compatible). Input for the channel selection bits.
Data 2 (Pin 13):
Bidirectional Digital Input/Output (TTL/
CMOS Compatible).
V
–
(Pin 14):
Negative Supply. For
±5V
dual supply appli-
cations, |V
–
| should not exceed |V
+
| by more than 20% for
proper channel selection.
D (Pin 15):
Analog Multiplexer Output/Analog
Demultiplexer Input.
V
+
(Pin 16):
Positive Supply.
APPLICATIO S I FOR ATIO
Multiplexer Operation
Figure 1 shows the block diagram of the components
within the LTC1390 required for MUX operation. The
LTC1390 uses Data 1 to select its 8 channels and a chip
select input CS to switch on the selected channel as shown
in Figure 2.
CLK
DATA 1
CS
CONTROL
LOGIC
4-BIT SHIFT
REGISTER
ANALOG
INPUT
MUX
BLOCK
ANALOG
OUTPUT
LTC1390 • F01
Figure 1: Simplified Block Diagram of the MUX Operation
CLK
CS
EN = HIGH
DATA 1
ANY
ANALOG
INPUTS
D
LTC1390 • F02
B2
B1
B0
t
ON
Figure 2: Multiplexer Operation
U
W
U U
U
U
U
When CS is high, the input data on the Data 1 pin is latched
into the 4-bit shift register on each rising clock edge. The
input data consists of an “EN” bit and a string of three bits
for channel selection. If “EN” bit is logic high as illustrated
in the first input data sequence, it enables the selected
channel. To ensure correct operation, the CS must be
pulled low before the next rising clock edge.
Once the CS is pulled low, all channels are simultaneously
switched off to ensure a break-before-make interval. After
a delay of t
ON
, the selected channel is switched on allowing
signal transmission. The selected channel remains on
until the next falling edge of CS, and after a delay of t
OFF
,
it terminates the analog signal transmission and subse-
quently allows the selection of the next channel. If “EN” bit
is logic low, as illustrated in the second data sequence, it
disables all channels and there will be no analog signal
EN = LOW
B2
B1
B0
t
OFF
sn1390 1390fs
5
51单片机
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