DATASHEET
HIP2105, HIP2106A
Low Voltage Driver for Synchronous Rectification
FN8999
Rev.1.00
Jun 6, 2018
The
HIP2105
and
HIP2106A
are high frequency
MOSFET drivers optimized to drive two N-channel
power MOSFETs in a synchronous buck converter
topology. The HIP2105 has HI/LI inputs and the
HIP2106A has a single PWM input. Both these drivers,
combined with Renesas multi-phase buck PWM
controllers, form a complete single-stage core-voltage
regulator solution with high-efficiency performance at
high switching frequency for advanced microprocessors.
The HIP2105 and HIP2106A are biased by a single low
voltage supply (5V), minimizing driver switching losses
in high MOSFET gate capacitance and high switching
frequency applications. Each driver is capable of driving
a 3nF load with less than 15ns rise/fall time.
Bootstrapping of the upper gate driver is implemented
using an internal low forward voltage drop diode,
reducing implementation cost, complexity, and allowing
the use of higher performance, cost effective N-channel
MOSFETs. Adaptive shoot-through protection on the
HIP2106A is integrated to prevent both MOSFETs from
conducting simultaneously.
The HIP2105 and HIP2106A feature a 4A typical sink
current for the lower gate driver, enhancing the lower
MOSFET gate hold-down capability during PHASE
node rising edge, preventing power loss caused by the
self turn-on of the lower MOSFET due to the high dV/dt
of the switching node.
The HIP2106A also features an input that recognizes a
high-impedance state, working together with Renesas
multi-phase 3.3V or 5V PWM controllers to prevent
negative transients on the controlled output voltage when
operation is suspended. This feature eliminates the need
for the Schottky diode that may be used in a power system
to protect the load from negative output voltage damage.
VCC
VCTRL
Shoot-
Through
Protection
BOOT
UGATE
PHASE
VCC
LGATE
GND
VCTRL = Controller VCC
HIP2106A
Features
• Adaptive shoot-through protection (HIP2106A only)
• HI and LI inputs (HIP2105 only)
• 0.4Ω ON-resistance and 4A sink current capability
• Low tri-state hold-off time (20ns) (HIP2106A only)
• Supports 3.3V and 5V HI/LI or PWM input
• Power-On Reset (POR)
• Dual Flat No-Lead (DFN) package
• Compliant to JEDEC PUB95 MO-220 QFN-Quad
Flat No Leads - product outline
• Near chip-scale package footprint; improves PCB
efficiency and thinner in profile
Applications
• Wireless chargers
• High frequency low profile high efficiency DC/DC
converters
• High current low voltage DC/DC converters
• E-cigarette
Related Literature
For a full list of related documents, visit our website
•
HIP2105
and
HIP2106A
product pages
VCC
BOOT
UGATE
Shoot-
Through
Protection
PHASE
VCC
LGATE
GND
HIP2105
7k
PWM
7k
Control
Logic
HI
LI
Control
Logic
Figure 1. Block Diagrams
FN8999 Rev.1.00
Jun 6, 2018
Page 1 of 17
HIP2105, HIP2106A
Contents
1.
1.1
1.2
1.3
1.4
2.
2.1
2.2
2.3
2.4
2.5
2.6
3.
3.1
3.2
3.3
3.4
4.
4.1
4.2
4.3
5.
6.
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Typical Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
4
5
5
Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timing Test Setups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6
6
6
7
8
9
Device Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Operation and Adaptive Shoot-Through Protection (HIP2106A) . . . . . . . . . . . . . . . . . . . . . . .
HI/LI Inputs (HIP2105) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Bootstrap Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
10
11
11
Application Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
MOSFET Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Layout Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Upper MOSFET Self Turn-On Effects at Startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Package Outline Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
FN8999 Rev.1.00
Jun 6, 2018
Page 2 of 17
HIP2105, HIP2106A
1. Overview
1.
1.1
Overview
Typical Applications
V
IN
+5V
+3.3V
+3.3V
VCC
VCTRL
PWM1
PWM2
PWM
Controller
(ISL69XX)
PWM
HIP2106A
PHASE
LGATE
BOOT
UGATE
R
UGPH
FB
VCC
VSEN
COMP
PGOOD
VID
(Optional)
ISEN1
ISEN2
+5V
V
IN
+V
CORE
FS/EN
GND
VCC
VCTRL
PWM
BOOT
UGATE
R
UGPH
HIP2106A
PHASE
LGATE
R
UGPH
is required for special power sequencing applications
(see
“Upper MOSFET Self Turn-On Effects at Startup” on page 14)
Figure 2. Multi-Phase Converter Using HIP2106A Gate Drivers
FN8999 Rev.1.00
Jun 6, 2018
Page 3 of 17
HIP2105, HIP2106A
1. Overview
V
IN
+5V
+3.3V
+3.3V
VCC
BOOT
UGATE
HI1
LI1
HI2
PWM
LI2
Controller
(ISL69XX)
VID
(Optional)
ISEN1
ISEN2
+5V
V
IN
+V
CORE
HI
LI
HIP2105
PHASE
LGATE
R
UGPH
FB
VCC
VSEN
COMP
PGOOD
FS/EN
GND
VCC
BOOT
UGATE
R
UGPH
HI
LI
HIP2105
PHASE
LGATE
R
UGPH
is required for special power sequencing applications
(see
“Upper MOSFET Self Turn-On Effects at Startup” on page 14)
Figure 3. Multi-Phase Converter Using HIP2105 Gate Drivers
1.2
Ordering Information
Part
Marking
06IZ
06IZ
05FZ
05FZ
Temperature
Range (°C)
-40 to +85
-40 to +85
-40 to +125
-40 to +125
Tape and Reel
(Units) (Note
1)
-
6k
-
6k
Package
10 Ld 3x3 DFN
10 Ld 3x3 DFN
10 Ld 3x3 DFN
10 Ld 3x3 DFN
Pkg. Dwg. #
L10.3x3C
L10.3x3C
L10.3x3C
L10.3x3C
Part Number
(Notes
2, 3)
HIP2106AIRZ
HIP2106AIRZ-T
HIP2105FRZ
HIP2105FRZ-T
HIP2105-6MBEVAL1Z
HIP2105DBEVAL1Z
HIP2106ADBEVAL1Z
HIP2105/6A Mother Board
HIP2105 Daughter Board
HIP2106A Daughter Board
Notes:
1. Refer to
TB347
for details about reel specifications.
2. These Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and
100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free
soldering operations). Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), see the
HIP2105
and
HIP2106A
product information pages. For more information about
MSL, refer to
TB363.
FN8999 Rev.1.00
Jun 6, 2018
Page 4 of 17
HIP2105, HIP2106A
1. Overview
1.3
Pin Configurations
HIP2106A
10 Ld 3x3 DFN
Top View
UGATE
BOOT
NC
PWM
GND
1
2
3
4
5
PAD
10 PHASE
9
8
7
6
VCTRL
NC
VCC
LGATE
HIP2105
10 Ld 3x3 DFN
Top View
UGATE
BOOT
NC
HI
GND
1
2
3
4
5
PAD
10 PHASE
9
8
7
6
NC
LI
VCC
LGATE
1.4
Pin
Name
UGATE
Pin Descriptions
HIP2106A
Pin #
1
HIP2105
Pin #
1
Description
Upper gate drive output. Connect to the gate of the high-side N-channel power MOSFET. A gate
resistor is never recommended on this pin, because it interferes with the operation shoot-through
protection circuitry.Gate resistor avoidance only applies to HIP2106A. HIP2105 does not have
adaptive shoot-through protection.
Floating bootstrap supply pin for the upper gate drive. Connect a bootstrap capacitor between this
pin and the PHASE pin. The bootstrap capacitor provides the charge used to turn on the upper
MOSFET. See
“Bootstrap Considerations” on page 11
for guidance in choosing the appropriate
capacitor value.
No connect.
The PWM signal (for HIP2106A) is the control input for the driver. The PWM signal can enter three
distinct states during operation, see
“PWM Input and Threshold Control (HIP2106A)” on page 10
for
further details. Connect this pin to the PWM output of the controller.
The HI signal (for the HIP2105) is the input drive for the high side gate drive output.
Ground pin. All signals are referenced to this node.
Lower gate drive output. Connect to the gate of the low-side N-channel power MOSFET. A gate
resistor is never recommended on this pin, because it interferes with the operation shoot-through
protection circuitry.Gate resistor avoidance only applies to HIP2106A. HIP2105 does not have
adaptive shoot-through protection.
Connect this pin to a +5V bias supply. Locally bypass with a high quality ceramic capacitor to
ground.
This pin is the input drive for the low-side gate output.
This VCTRL pin (for HIP2106A) sets the PWM logic threshold. Connect this pin to 3.3V source for
3.3V PWM input or pull it to 5V source for 5V PWM input.
Connect this pin to the source of the upper MOSFET. This pin provides the return path for the upper
gate driver current.
The metal pad underneath the center of the IC is a thermal substrate. The PCB “thermal land”
design for this exposed die pad should include vias that drop down and connect to one or more
buried copper plane(s). This combination of vias for vertical heat escape and buried planes for heat
spreading allows the DFN to achieve its full thermal potential. This pad should be either grounded or
floating, and it should not be connected to other nodes. Refer to
TB389
for design guidelines.
BOOT
2
2
NC
PWM
3, 8
4
3, 9
-
HI
GND
LGATE
-
5
6
4
5
6
VCC
LI
VCTRL
PHASE
Thermal
Pad
7
-
9
10
Pad
7
8
-
10
Pad
FN8999 Rev.1.00
Jun 6, 2018
Page 5 of 17
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