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FUJITSU SEMICONDUCTOR
Data Sheet
FME-MB88121-1.48E
Automotive Solutions
CMOS
FlexRay ASSP
MB88121/MB88121A/MB88121B/MB88121C
■
DESCRIPTION
The MB88121 Series FlexRay ASSP (application specific standard product) facilitates to add FlexRay connectivity
to 8-bit, 16-bit and 32-bit microcontrollers that do not comprise embedded FlexRay protocol cores. The device
features a FlexRay communication controller based on the ERAY
*1
IP core provided by Bosch. The most recent
FlexRay communication controller complies to the protocol definition 2.1 of the FlexRay consortium. Fujitsu intends
to update the communications controller when new protocol definitions are released. Please, refer to the chapter
‘product lineup’ for a cross reference between device version and protocol version supported. Several parallel
and serial interfaces provide connectivity to a vast number of host processors.
All types of host interfaces are selectable by mode pins that supersede any programming by the user. The
configurable parallel host interface connects to most 16-bit and 32-bit microcontrollers while SPI offers serial
interfacing options. A DMA support unit avoids that the application on the host processor has to wait until the
input buffer becomes available for writing.
The version suffix ’B/C’ of the ASSP is operated from a single 3.3V or 5.0 V supply and includes an on board
voltage regulator that provides 1.8 V to the internal core. This creates a major advantage in terms of EMI and
power consumption.
The internal PLL clock frequency multiplier provides an internal 80 MHz clock from an external 4 MHz, 5 MHz,
8 MHz, 10 MHz, 16 MHz
*2
or 20 MHz
*2
clock. Alternatively the user may choose to drive the clock input with a
square wave signal from the host processor.
*1 : License of Robert Bosch GmbH
*2 : MB88121C only
rev 1.48
29/Jan/2013
MB88121
■
PACKAGE
64-pin Plastic LQFP
FlexRay ASSP
(FPT-64P-M03/M24)
The device is offered in a standard 64-pin quad flatpack package with a pin pitch of 0.5 mm.
■
FEATURES
• FlexRay communication controller based on ERAY
*1
IP core from Bosch
• Data rates of up to 10 Mbit/s on each channel
• Up to 128 message buffers configurable
• 8 Kbyte of Message RAM for storage of e.g. 128 message buffers with max. 48 byte data section or up to
30 message buffers with 254 byte data section
• Configuration of message buffers with different payload lengths possible
• One configurable receive FIFO
• Each message buffer can be configured as receive buffer, as transmit buffer or as part of the receive FIFO
• Host access to message buffers via Input and Output Buffer
Input Buffer: Holds message to be transferred to the Message RAM
Output Buffer: Holds message read from the Message RAM
• Filtering for slot counter, cycle counter, and channel
• Maskable module interrupts
• Network Management supported
• Configurable parallel host interface
• SPI interface (8 Mbit/s) (MB88121B/C only)
• DMA support unit (MB88121A/B/C only)
• 0.18μm CMOS Process Technology
• Single voltage supply (5.0 V / 3.3 V), internal voltage regulator for 1.9 V core voltage offering low EMI and low
power consumption (MB88121B/C only)
• Package : 64-pin
*2
plastic LQFP;
*1 : License of Robert Bosch GmbH
*2: Other packages such as 48-pin plastic LQFP featuring only SPI host interface are under consideration.
2
rev 1.48
29/Jan/2013
MB88121
■
PRODUCT LINEUP
Part Number
Parameter
MB88121
MB88121A
MB88121B
FlexRay ASSP
MB88121C
Direct clock input:
80MHz.
On-chip PLL
(jitter evaluation
pending)
External clock input
4/5/8/10/16/20 MHz
System clock
Direct clock input: 80MHz (or 40MHz
for 5Mbit/s).
On-chip PLL (evaluation pending):
External clock 10 MHz, internal clock
80 MHz (50% duty cycle).
0.18μm CMOS with triple voltage
supply
(5.0V, 3.3V, 1,8V).
5.0V±0.5V, 3.3V±0.3V, 1.8V±0.15V
T
A
=
− °
C to +85
°
C
40
On-chip PLL
(jitter evaluation
pending)
External clock input
4/5/8/10 MHz
Technology
Operating voltage
range
Temperature range
Package
FlexRay Protocol ver-
sion
0.18μm CMOS with on-chip voltage regula-
tor for internal power supply.
3.0 V - 5.5 V
40
105
T
A
=
− °
C to
+
°
C
LQFP-64
T
A
=
− °
C to
+
40
125
°
C
2.0
2.1
V2.1
Parallel host interface
Configurable parallel host interface
Configurable parallel host interface compat-
compatible with Fujitsu 32-bit FR mi-
ible with Fujitsu 16-bit 16FX and 32-bit FR
crocontrollers.
microcontrollers.
Maximum frequency 33MHz (target)
-
Configurable clocking schemes and bit di-
rection.
Generates DMA request signal for host processor for writing the
input buffer. Thus the possibility that the input buffer is busy
does not produce any waiting time at the host that can issue oth-
er tasks during the buffer writing.
-
Generates an interrupt when internal or ex-
ternal operating voltage drops below certain
limits.
SPI interface
DMA support unit
-
Low voltage interrupt
(tbd)
.
rev 1.48
29/Jan/2013
3
MB88121
■
PIN ASSIGNMENTS
FlexRay ASSP
1. Pin assignment in 16 bit multiplexed parallel mode (MB88121B/C only)
(TOP VIEW)
MBSU_RX2/NC
MBSU_RX1/NC
MBSU_TX2/NC
MBSU_TX1/NC
INT4
INT3
INT2
INT1
VCC
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
VSS
D13
D12
D11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
MD2
VSS
D14
D15
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
TXENA
CYCS0
CYCS
STPW
TXDA
RXDA
INT0
MD1
BCLK
VCC
MD0
VSS
RST
X1
X0
SDS
VCC
DMA_REQ
MDE0
MDE1
MDE2
RDY
TXDB
TXENB
RXDB
MT
ALE/AS
WR
RD
CS
C
VSS
(FPT-64P-M03/M24)
4
rev 1.48
29/Jan/2013
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