The WMS712x is a 64 non-volatile linear digital potentiometers available in 10KΩ, 50KΩ and 100KΩ
resistance values. The WMS7120/1 can be used as a three-terminal potentiometer or as a two
terminal variable resistor in a wide variety of applications.
The output of each potentiometer is determined by the wiper position, which varies in linearly between
V
A
and V
B
terminal according to the content stored in the volatile Tap Register (TR) which is
programmed through Up/Down (Increment/Decrement) interface. The channel has one non-volatile
memory location (NVMEM0) that can be directly written to by users through the Up/Down interface.
Power-on recall is also built in so the content of the NVMEM0 to Tap Register is automatically loaded.
The WMS7120/1 devices pin out the resistor wiper directly. The WMS7121 devices feature an output
buffer with 3mA minimum drive capability.
All the WMS7120/1 devices are single channel devices offered in 8-pin PDIP, SOIC and MSOP
packages. The WMS7120/1 devices operate over a wide operating voltage ranging from 2.7V to
5.5V.
2. FEATURES
•
•
•
•
•
•
•
•
•
•
•
•
•
Drop-in replacements for many popular parts
Available output buffer for WMS7121 devices
Single linear-taper channel
64 taps
10K, 50K and 100K end-to end resistance
V
SS
to V
DD
terminal voltages
Non-volatile storage of wiper positions with power-on recall
Data storage and potentiometer control through Up/Down (3-wire) interface
Endurance 100,000 write cycles
Data retention 100 years
Package options:
o
8-pin PDIP, SOIC or MSOP
Industrial temperature range: -40° ~ 85°C
Single supply operation 2.7V to 5.5V
-2-
WMS7120/1
3. BLOCK DIAGRAM
Tap Register
V
A
INC
CS
U/D
Up/Down
Serial
Interface
Decoder
V
W
V
B
NV Memory
V
SS
NV Memory
Control
NVMEM0
V
DD
FIGURE 1 – WMS7120 BLOCK DIAGRAM (Rheostat Mode)
Tap Register
V
A
INC
CS
U/D
Up/Down
Serial
Interface
Decoder
V
W
V
B
NV Memory
V
SS
NV Memory
Control
NVMEM0
V
DD
FIGURE 2 – WMS7121 BLOCK DIAGRAM (Divider Mode)
-3-
Publication Release Date: April 21, 2005
Revision 1.1
WMS7120/1
4. TABLE OF CONTENTS
1. GENERAL DESCRIPTION.................................................................................................................. 2
2. FEATURES ......................................................................................................................................... 2
DSP 与 ARM 处理器
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
