If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Storage Temperature (T
STG
)
Maximum Junction Temperature (T
J
)
Ceramic
V
EE
Pin Potential to Ground Pin
Input Voltage (DC)
Output Current (DC Output HIGH)
ESD (Note 2)
−65˚C to +150˚C
+175˚C
−7.0V to +0.5V
V
EE
to +0.5V
−50 mA
≥2000V
Recommended Operating
Conditions
Case Temperature (T
C
)
Military
Supply Voltage (V
EE
)
−55˚C to +125˚C
−5.7V to −4.2V
Note 1:
Absolute maximum ratings are those values beyond which the de-
vice may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2:
ESD testing conforms to MIL-STD-883, Method 3015.
Military Version
DC Electrical Characteristics
V
EE
= −4.2V to −5.7V, V
CC
= V
CCA
= GND, T
C
= −55˚C to +125˚C
Symbol
V
OH
V
OL
V
OHC
V
OLC
V
IH
V
IL
I
IL
I
IH
Parameter
Output HIGH Voltage
Output LOW Voltage
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input LOW Current
Input HIGH Current
Data
Enable
Data
Enable
I
EE
Power Supply Current
−65
350
240
500
340
−20
mA
−55˚C to +125˚C
Inputs Open
(Notes 3, 4,
5)
µA
−55˚C
µA
0˚C to +125˚C
V
EE
= −5.7V
V
IN
= V
IH (Max)
(Notes 3, 4,
5)
−1165
Min
−1025
−1085
Max
−870
−870
Units
mV
mV
mV
mV
mV
mV
−1610
−1555
−870
mV
mV
mV
mV
µA
T
C
0˚C to +125˚C
−55˚C
0˚C to +125˚C
−55˚C
0˚C to +125˚C
−55˚C
0˚C to +125˚C
−55˚C
−55˚C to +125˚C
−55˚C to +125˚C
−55˚C to +125˚C
Guaranteed HIGH Signal
for All Inputs
−1830 −1475
0.50
Guaranteed LOW Signal
for All Inputs
V
EE
= −4.2V
V
IN
= V
IL (Min)
(Notes 3, 4,
5, 6)
(Notes 3, 4,
5, 6)
(Notes 3, 4,
5)
V
IN
= V
IH (Min)
or V
IL (Max)
Loading with
50Ω to −2.0V
(Notes 3, 4,
5)
V
IN
= V
IH (Max)
or V
IL(Min)
Loading with
50Ω to −2.0V
(Notes 3, 4,
5)
Conditions
Notes
−1830 −1620
−1830 −1555
−1035
−1085
Note 3:
F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately
without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides “cold start” specs which can be considered a worst case
condition at cold temperatures.
Note 4:
Screen tested 100% on each device at −55˚C, +25˚C, and +125˚C, Subgroups 1, 2, 3, 7, and 8.
Note 5:
Sample tested (Method 5005, Table I) on each manufactured lot at −55˚C, +25˚C, and +125˚C, Subgroups A1, 2, 3, 7, and 8.
Note 6:
Guaranteed by applying specified input condition and testing V
F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately
after power-up. This provides “cold start” specs which can be considered a worst case condition at cold temperatures.
Note 8:
Screen tested 100% on each device at +25˚C, Subgroup A9.
Note 9:
Sample tested (Method 5005, Table I) on each manufactured lot at +25˚C, Subgroup A9, and at +125˚C and −55˚C temperatures, Subgroups A10 and A11.
Note 10:
Not tested at +25˚C, +125˚C, and −55˚C temperature (design characterization data).
Note 11:
The propagation delay specified is for single output switching. Delays may vary up to 150 ps with multiple outputs switching.
Test Circuitry
DS100297-5
Notes:
V
CC
, V
CCA
= +2V, V
EE
= −2.5V.
L1 and L2 = equal length 50Ω impedance lines.
R
T
= 50Ω terminator internal to scope.
Decoupling 0.1 µF from GND to V
CC
and V
EE
.
All unused outputs are loaded with 50Ω to GND.
C
L
= Fixture and stray capacitance
≤
3 pF.
Pin numbers shown are for flatpak; for DIP see logic symbol.
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