Features
•
Industry Standard Architecture
– Low-cost Easy-to-use Software Tools
•
High-speed, Electrically-erasable Programmable Logic Devices
– 7.5 ns Maximum Pin-to-pin Delay
•
Several Power Saving Options
Device
ATF22V10B
ATF22V10BQ
ATF22V10BQL
I
CC
, Standby
85 mA
35 mA
5 mA
I
CC
, Active
90 mA
40 mA
20 mA
•
CMOS and TTL Compatible Inputs and Outputs
•
•
– Input and I/O Pull-up Resistors
Advanced Flash Technology
– Reprogrammable
– 100% Tested
High-reliability CMOS Process
– 20 Year Data Retention
– 100 Erase/Write Cycles
– 2,000V ESD Protection
– 200 mA Latchup Immunity
Full Military, Commercial, and Industrial Temperature Ranges
Dual-in-line and Surface Mount Packages in Standard Pinouts
PCI Compliant
High-
performance
EE PLD
ATF22V10B
•
•
•
Logic Diagram
Pin Configurations
All Pinouts Top View
Pin Name
CLK
TSSOP
CLK/IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
Function
Clock
IN
I/O
*
V
CC
Logic Inputs
Bidirectional Buffers
No Internal Connection
+5V Supply
CLK/IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
GND
DIP/SOIC
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
LCC/PLCC
IN
IN
CLK/IN
*
VCC
I/O
I/O
4
3
2
1
28
27
26
IN
IN
IN
*
IN
IN
IN
5
6
7
8
9
10
11
25
24
23
22
21
20
19
I/O
I/O
I/O
*
I/O
I/O
I/O
IN
IN
GND
*
IN
I/O
I/O
12
13
14
15
16
17
18
Rev. 0250G–06/99
1
Description
The ATF22V10B is a high performance CMOS (Electri-
cally-erasable) Programmable Logic Device (PLD) which
utilizes Atmel’s proven electrically-erasable Flash memory
technology. Speeds down to 7.5 ns and power dissipation
as low as 10 mA are offered. All speed ranges are specified
over the full 5V
±
10% range for military and industrial
temperature ranges, and 5V
±
5% for commercial tempera-
ture ranges.
Several low power options allow selection of the best solu-
tion for various types of power-limited applications. Each of
these options significantly reduces total system power and
enhances system reliability.
Absolute Maximum Ratings*
Temperature Under Bias................................ -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V
(1)
Voltage on Input Pins
with Respect to Ground
During Programming.....................................-2.0V to +14.0V
(1)
Programming Voltage with
Respect to Ground .......................................-2.0V to +14.0V
(1)
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability.
Note:
1. Minimum voltage is -0.6V DC, which may under-
shoot to -2.0V for pulses of less than 20 ns.
Maximum output pin voltage is V
CC
+ 0.75V DC,
which may overshoot to 7.0V for pulses of less
than 20 ns.
DC and AC Operating Conditions
Commercial
Operating Temperature (Ambient)
V
CC
Power Supply
0°C - 70°C
5V
±
5%
Industrial
-40°C - 85°C
5V
±
10%
Military
-55°C - 125°C
5V
±
10%
2
ATF22V10B
ATF22V10B
DC Characteristics
Symbol
I
IL
I
IH
Parameter
Input or I/O
Low Leakage Current
Input or I/O
High Leakage Current
Condition
0
≤
V
IN
≤
V
IL
(Max)
3.5
≤
V
IN
≤
V
CC
Com.
B-7, -10
Ind., Mil.
Power Supply Current,
Standby
V
CC
= Max,
V
IN
= Max,
Outputs Open
Com.
B-15, -25
Ind., Mil.
BQ-15
BQL-20, -25
Ind., Mil.
Com.
B-7, -10
Ind., Mil.
Clocked Power
Supply Current
V
CC
= Max,
Outputs Open,
f = 15 MHz
Com.
B-15, -25
Ind., Mil.
BQ-15
BQL-20, -25
Ind., Mil.
I
OS(1)
V
IL
V
IH
V
OL
V
OH
Note:
Output Short
Circuit Current
Input Low Voltage
Input High Voltage
Output Low Voltage
V
IN
= V
IH
or V
IL
,
V
CC
= Min
I
OL
= 16 mA
I
OL
= 12 mA
Com., Ind.
Mil.
V
OUT
= 0.5V
-0.5
2.0
20
70
-130
0.8
V
CC
+ 0.75
0.5
0.5
mA
mA
V
V
V
V
V
Com.
Com.
65
40
20
120
60
50
mA
mA
mA
90
65
145
90
mA
mA
5
90
15
120
mA
mA
Com.
Com.
65
35
5
115
55
10
mA
mA
mA
85
65
140
90
mA
mA
85
Min
Typ
-35
Max
-100
10
120
Units
µA
µA
mA
I
CC
I
CC2
V
IN
= V
IH
or V
IL
,
2.4
I
OH
= -4.0 mA
V
CC
= Min
1. Not more than one output at a time should be shorted. Duration of short circuit test should not exceed 30 sec.
Output High Voltage
3
AC Waveforms
(1)
Note:
1. Timing measurement reference is 1.5V. Input AC driving levels are 0.0V and 3.0V, unless otherwise specified.
AC Characteristics
(1)
-7
Symbol
t
PD
t
CO
t
CF
t
S
t
H
Parameter
Input or Feedback to
Combinatorial Output
Clock to Output
Clock to Feedback
Input or Feedback Setup Time
Hold Time
External Feedback 1/(t
S
+ t
CO
)
F
MAX
Internal Feedback 1/(t
S
+ t
CF
)
No Feedback 1/(t
WH
+ t
WL
)
t
W
t
EA
t
ER
t
AP
t
AW
t
AR
t
SP
t
SPR
Notes:
Clock Width (t
WL
and t
WH
)
Input or I/O to Output Enable
Input or I/O to Output Disable
Input or I/O to Asynchronous
Reset of Register
Asynchronous Reset Width
Asynchronous Reset
Recovery Time
Setup Time, Synchronous Preset
3.5
0
125
(3)
166
166
3
3
3
3
7
5
4.5
7.5
7.5
10
Min
3
2
Max
7.5
4.5
(2)
2.5
4.5
0
90
142
142
3.5
3
3
3
8
6
6
8
10
9
12
Min
3
2
-10
Max
10
6.5
2.5
10
0
55.5
69
83.3
6
3
3
3
15
10
10
10
15
15
20
10
3
3
3
20
20
14
14
20
20
22
0
38.5
45.5
Min
3
2
-15
Max
15
8
2.5
Min
3
2
-20
Max
20
12
8
14
15
0
33.3
40
38.5
13
3
3
3
25
25
15
15
25
25
25
Min
3
2
-25
Max
25
15
13
Units
ns
ns
ns
ns
ns
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
Synchronous Preset to
5
Clock Recovery Time
1. See ordering information for valid part numbers.
2. 5.5 ns for DIP package devices.
3. 111 MHz for DIP package devices.
4
ATF22V10B
ATF22V10B
Input Test Waveforms and
Measurement Levels
Outout Test Loads
Commercial
Military
t
R
, t
F
< 3 ns
* All except -7 which is R2 = 300Ω
Pin Capacitance
f = 1 MHz, T = 25°C
(1)
Typ
C
IN
C
OUT
Note:
5
6
Max
8
8
Units
pF
pF
Conditions
V
IN
= 0V
V
OUT
= 0V
1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
Power-up Reset
The registers in the ATF22V10Bs are designed to reset
during power-up. At a point delayed slightly from V
CC
crossing V
RST
, all registers will be reset to the low state.
The output state will depend on the polarity of the output
buffer.
This feature is critical for state machine initialization. How-
ever, due to the asynchronous nature of reset and the
uncertainty of how V
CC
actually rises in the system, the
following conditions are required:
1. The V
CC
rise must be monotonic,
2. After reset occurs, all input and feedback setup times
must be met before driving the clock pin high, and
3. The clock must remain stable during t
PR
.
Parameter
t
PR
Description
Power-up
Reset Time
Power-up
Reset
Voltage
Typ
600
Max
1,000
Units
ns
Preload of Registered Outputs
The ATF22V10B’s registers are provided with circuitry to
allow loading of each register with either a high or a low.
This feature will simplify testing since any state can be
forced into the registers to control test sequencing. A
JEDEC file with preload is generated when a source file
with vectors is compiled. Once downloaded, the JEDEC file
preload sequence will be done automatically by most of the
approved programmers after the programming.
V
RST
3.8
4.5
V
Security Fuse Usage
A single fuse is provided to prevent unauthorized copying
of the ATF22V10B fuse patterns. Once programmed, fuse
verify and preload are inhibited. However, the 64-bit User
Signature remains accessible.
The security fuse should be programmed last, as its effect
is immediate.
5
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