D ts e t
aa h e
R c e t r lc r nc
o h se Ee to is
Ma u a t r dCo o e t
n fc u e
mp n n s
R c e tr b a d d c mp n ns ae
o h se rn e
o oet r
ma ua trd u ig ete dewaes
n fcue sn i r i/ fr
h
p rh s d f m te oiia s p l r
uc a e r
o h r n l u pi s
g
e
o R c e tr waes rce td f m
r o h se
fr e rae r
o
te oiia I. Al rce t n ae
h
r nl P
g
l e rai s r
o
d n wi tea p o a o teOC
o e t h p rv l f h
h
M.
P r aetse u igoiia fcoy
at r e td sn r n la tr
s
g
ts p o rmso R c e tr e eo e
e t rga
r o h se d v lp d
ts s lt n t g aa te p o u t
e t oui s o u rne
o
rd c
me t o e c e teOC d t s e t
es r x e d h
M aa h e.
Qu l yOv riw
ai
t
e ve
• IO- 0 1
S 90
•A 92 cr ct n
S 1 0 et ai
i
o
• Qu l e Ma ua trr Ls (
ai d
n fcues it QML MI- R -
) LP F
385
53
•C a sQ Mitr
ls
lay
i
•C a sVS a eL v l
ls
p c ee
• Qu l e S p l r Ls o D sr uos( L )
ai d u pi s it f it b tr QS D
e
i
•R c e trsacic l u pir oD A a d
o h se i
r ia s p l t L n
t
e
me t aln u t a dD A sa d r s
es lid sr n L tn ad .
y
R c e tr lcrnc , L i c mmi e t
o h se Ee t is L C s o
o
tdo
t
s p ligp o u t ta s t f c so r x e t-
u pyn rd cs h t ai y u tme e p ca
s
t n fr u lya daee u loto eoiial
i s o q ai n r q a t h s r n l
o
t
g
y
s p l db id sr ma ua trr.
u pi
e yn ut
y n fcues
T eoiia ma ua trr d ts e t c o a yn ti d c me t e e t tep r r n e
h r n l n fcue’ aa h e a c mp n ig hs o u n r cs h ef ma c
g
s
o
a ds e ic t n o teR c e tr n fcue v rino ti d vc . o h se Ee t n
n p c ai s f h o h se ma ua trd eso f hs e ie R c e tr lcr -
o
o
isg aa te tep r r n eo i s mio d co p o u t t teoiia OE s e ic -
c u rne s h ef ma c ft e c n u tr rd cs o h r n l M p c a
o
s
g
t n .T pc lv le aefr eee c p r o e o l. eti mii m o ma i m rt g
i s ‘y ia’ au s r o rfrn e up s s ny C r n nmu
o
a
r xmu ai s
n
ma b b s do p o u t h rceiain d sg , i lt n o s mpetsig
y e a e n rd c c aa tr t , e in smuai , r a l e t .
z o
o
n
© 2 1 R cetr l t n s LC Al i t R sre 0 1 2 1
0 3 ohs E cr i , L . lRg s eevd 7 1 0 3
e e oc
h
T l r m r, l s v iw wrcl . m
o e n oe p ae it w . e c o
a
e
s
o ec
NTD20N03L27
Power MOSFET
20 Amps, 30 Volts, N−Channel DPAK
This logic level vertical power MOSFET is a general purpose part
that provides the “best of design” available today in a low cost power
package. Avalanche energy issues make this part an ideal design in.
The drain−to−source diode has a ideal fast but soft recovery.
Features
http://onsemi.com
•
•
•
•
•
•
•
•
•
•
•
Ultra−Low R
DS(on)
, Single Base, Advanced Technology
SPICE Parameters Available
Diode is Characterized for use in Bridge Circuits
I
DSS
and V
DS(on)
Specified at Elevated Temperatures
High Avalanche Energy Specified
ESD JEDAC rated HBM Class 1, MM Class A, CDM Class 0
These Devices are Pb−Free and are RoHS Compliant
Power Supplies
Inductive Loads
PWM Motor Controls
Replaces MTD20N03L in many Applications
20 A, 30 V, R
DS(on)
= 27 mW
N−Channel
D
G
S
Typical Applications
MARKING
DIAGRAMS
4
Drain
YWW
20
N3LG
2
1
3
Drain
Gate
Source
4
Drain
4
DPAK−3
CASE 369D
STYLE 2
YWW
20
N3LG
1 2 3
Gate Drain Source
Value
30
30
"20
"24
20
16
60
74
0.6
1.75
−55
to
150
288
Unit
Vdc
Vdc
Vdc
1 2
3
4
DPAK
CASE 369C
STYLE 2
MAXIMUM RATINGS
(T
C
= 25°C unless otherwise noted)
Rating
Drain−to−Source Voltage
Drain−to−Gate Voltage (R
GS
= 1.0 MW)
Gate−to−Source Voltage
−
Continuous
−
Non−Repetitive (t
p
v10
ms)
Drain Current
−
Continuous @ T
A
= 25_C
−
Continuous @ T
A
= 100_C
−
Single Pulse (t
p
v10
ms)
Total Power Dissipation @ T
A
= 25_C
Derate above 25°C
Total Power Dissipation @ T
C
= 25°C (Note 1)
Operating and Storage Temperature Range
Single Pulse Drain−to−Source Avalanche
Energy
−
Starting T
J
= 25°C
(V
DD
= 30 Vdc, V
GS
= 5 Vdc, L = 1.0 mH,
I
L(pk)
= 24 A, V
DS
= 34 Vdc)
Thermal Resistance
−
Junction−to−Case
−
Junction−to−Ambient
−
Junction−to−Ambient (Note 1)
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10 seconds
Symbol
V
DSS
V
DGR
V
GS
V
GS
I
D
I
D
Adc
Apk
W
W/°CW
°C
mJ
I
DM
P
D
T
J
, T
stg
E
AS
1
2
3
R
qJC
R
qJA
R
qJA
T
L
1.67
100
71.4
260
°C/W
20N3L
Y
WW
G
= Device Code
= Year
= Work Week
= Pb−Free Package
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. When surface mounted to an FR4 board using the minimum recommended
pad size and repetitive rating; pulse width limited by maximum junction
temperature.
©
Semiconductor Components Industries, LLC, 2010
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
October, 2010
−
Rev. 4
1
Publication Order Number:
NTD20N03L27/D
NTD20N03L27
ELECTRICAL CHARACTERISTICS
(T
C
= 25°C unless otherwise noted)
Characteristic
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage (Note 2)
(V
GS
= 0 Vdc, I
D
= 250
mAdc)
Temperature Coefficient (Positive)
Zero Gate Voltage Drain Current
(V
DS
= 30 Vdc, V
GS
= 0 Vdc)
(V
DS
= 30 Vdc, V
GS
= 0 Vdc, T
J
=150°C)
Gate−Body Leakage Current (V
GS
=
±
20 Vdc, V
DS
= 0 Vdc)
ON CHARACTERISTICS
(Note 2)
Gate Threshold Voltage (Note 2)
(V
DS
= V
GS
, I
D
= 250
mAdc)
Threshold Temperature Coefficient (Negative)
Static Drain−to−Source On−Resistance (Note 2)
(V
GS
= 4.0 Vdc, I
D
= 10 Adc)
(V
GS
= 5.0 Vdc, I
D
= 10 Adc)
Static Drain−to−Source On−Voltage (Note 2)
(V
GS
= 5.0 Vdc, I
D
= 20 Adc)
(V
GS
= 5.0 Vdc, I
D
= 10 Adc, T
J
= 150°C)
Forward Transconductance (Note 2) (V
DS
= 5.0 Vdc, I
D
= 10 Adc)
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Transfer Capacitance
SWITCHING CHARACTERISTICS
(Note 3)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
Gate Charge
(V
DD
= 20 Vdc, I
D
= 20 Adc,
V
GS
= 5.0 Vdc,
R
G
= 9.1
W)
(Note 2)
(V
DS
= 48 Vdc, I
D
= 15 Adc,
V
GS
= 10 Vdc) (Note 2)
t
d(on)
t
r
t
d(off)
t
f
Q
T
Q
1
Q
2
V
SD
−
−
−
−
−
−
−
17
137
38
31
13.8
2.8
6.6
25
160
45
40
18.9
−
−
Vdc
−
−
−
−
−
−
1.0
0.9
23
13
10
0.017
1.15
−
−
−
−
−
mC
ns
nC
ns
(V
DS
= 25 Vdc, V
GS
= 0 Vdc,
f = 1.0 MHz)
C
iss
C
oss
C
rss
−
−
−
1005
271
87
1260
420
112
pF
V
GS(th)
Vdc
1.0
−
−
−
−
−
−
1.6
5.0
28
23
0.48
0.40
21
2.0
−
31
27
Vdc
0.54
−
−
mhos
mV/°C
mW
V
(BR)DSS
Vdc
30
−
−
−
−
−
43
−
−
−
−
−
10
100
±100
mV/°C
mAdc
Symbol
Min
Typ
Max
Unit
I
DSS
I
GSS
nAdc
R
DS(on)
V
DS(on)
g
FS
SOURCE−DRAIN DIODE CHARACTERISTICS
Forward On−Voltage
(I
S
= 20 Adc, V
GS
= 0 Vdc) (Note 2)
(I
S
= 20 Adc, V
GS
= 0 Vdc, T
J
= 125°C)
(I
S
=15 Adc, V
GS
= 0 Vdc,
dl
S
/dt = 100 A/ms) (Note 2)
Reverse Recovery Stored Charge
2. Pulse Test: Pulse Width
≤
300
ms,
Duty Cycle
≤
2%.
3. Switching characteristics are independent of operating junction temperature.
Reverse Recovery Time
t
rr
t
a
t
b
Q
RR
ORDERING INFORMATION
Device
NTD20N03L27G
NTD20N03L27−1G
NTD20N03L27T4G
Package
DPAK
(Pb−Free)
DPAK−3
(Pb−Free)
DPAK
(Pb−Free)
Shipping
†
75 Units/Rail
75 Units/Rail
2500 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
2
NTD20N03L27
40
−I
D
, DRAIN CURRENT (AMPS)
35
30
25
20
15
10
5
0
0
0.2
0.4
0.6
T
J
= 25°C
40
I
D
, DRAIN CURRENT (AMPS)
V
GS
= 4 V
V
GS
= 4.5 V
V
GS
= 5 V
V
GS
= 6 V
V
GS
= 3.5 V
V
GS
= 3 V
V
GS
= 2.5 V
1.2
1.4
1.6
1.8
2
36
32
28
24
20
16
12
8
4
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
T
J
= 100°C
T
J
= 25°C
T
J
=
−55°C
V
GS
= 10 V
V
GS
= 8 V
V
DS
> = 10 V
0.8
1
−V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
−V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
0.04
0.035
0.03
0.025
0.02
0.015
0.01
0.005
0
2
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
V
GS
= 5 V
T
J
= 100°C
T
J
= 25°C
T
J
=
−55°C
0.03
T
J
= 25°C
V
GS
= 5 V
0.025
0.02
V
GS
= 10 V
0.015
5
8
12
15
18
22
25
28
32
35
38
0.01
0
4
8
12
16
20
24
28
32
36
40
I
D
, DRAIN CURRENT (AMPS)
I
D
, DRAIN CURRENT (AMPS)
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)
Figure 3. On−Resistance vs. Drain Current and
Temperature
1.6
1.4
1.2
1
0.8
0.6
−50
1000
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
I
D
= 10 A
V
GS
= 5 V
V
GS
= 0 V
T
J
= 125°C
−I
DSS
, LEAKAGE (nA)
100
T
J
= 100°C
10
−25
0
25
50
75
100
125
150
1
0
3
6
9
12
15
18
21
24
27
30
T
J
, JUNCTION TEMPERATURE (°C)
−V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
http://onsemi.com
3
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
NTD20N03L27
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
2500
200
12
10
8
V
GS
6
4
2
0
Q
1
Q
2
Q
V
GS
−
V
DS
C, CAPACITANCE (pF)
1500
C
iss
1000
500
0
10 8 6 4
C
oss
C
rss
2 0 2
I
D
= 20 A
T
J
= 25°C
0
2
4
6
8
10
12
14
4 6 8 10 12 14 16 18 20 23 25
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)
Q
g
, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
1000
I
S
, SOURCE CURRENT (AMPS)
20
18
16
14
12
10
8
6
4
2
0
0.0
V
GS
= 0 V
T
J
= 25°C
t, TIME (ns)
100
t
r
t
f
t
d(off)
10
t
d(on)
1
V
DS
= 20 V
I
D
= 20 A
V
GS
= 5.0 V
T
J
= 25°C
10
R
G
, GATE RESISTANCE (W)
100
1
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
E
AS
, SINGLE PULSE DRAIN−TO−SOURCE
AVALANCHE ENERGY (mJ)
350
300
250
200
150
100
50
0
25
50
75
Figure 10. Diode Forward Voltage vs. Current
I
D
= 24 A
100
125
150
T
J
, STARTING JUNCTION TEMPERATURE (°C)
Figure 11. Maximum Avalanche Energy vs.
Starting Junction Temperature
http://onsemi.com
4
单片机
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
