FemtoClock
®
Crystal-to-3.3V LVPECL
Clock Generator
ICS843031
DATA SHEET
G
ENERAL
D
ESCRIPTION
The 843031 is a 1 Gigabit Ethernet Clock Generator. The
843031 can synthesize 1 Gigabit Ethernet, SONET, or Serial
ATA reference clock frequencies with the appropriate choice of
crystal and output divider. The 843031 has excellent phase jitter
performance and is packaged in a small 8-pin TSSOP, making
it ideal for use in systems with limited board space.
F
EATURES
•
One differential 3.3V LVPECL output
•
Crystal oscillator interface designed for 18pF parallel resonant
crystals
•
Output frequency range: 290MHz - 350MHz
•
VCO frequency range: 580MHz - 700MHz
•
RMS phase jitter @312.5MHz (1.875MHz - 20MHz):
0.475ps (typical)
RMS phase jitter @318.75MHz (1.875MHz - 20MHz):
0.475ps (typical)
•
3.3V operating supply
•
0°C to 70°C ambient operating temperature
•
Available in lead-free (RoHS 6) package
•
For functional replacement part use 843031i-01
F
REQUENCY
T
ABLE
Inputs
Crystal Frequency (MHz)
25.92
26.04166
26.5625
M/N Ratio (Multiplier)
12
12
12
Output Frequency
(MHz)
311.04
312.5
318.75
B
LOCK
D
IAGRAM
P
IN
A
SSIGNMENT
V
CC
XTAL_OUT
XTAL_IN
V
EE
1
2
3
4
8
7
6
5
Q0
nQ0
V
CC
PWR_DN
XTAL_IN
OSC
XTAL-OUT
Phase
Detector
VCO
÷2
nQ0
Q0
843031
8-Lead TSSOP
4.40mm x 3.0mm x 0.925mm
package body
G Package
Top View
÷24
(fixed)
PWR_DN
843031 REVISION A 11/5/15
1
©2015
Integrated Device Technology, Inc.
843031 Data Sheet
FEMTOCLOCK
®
CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR
T
ABLE
1. P
IN
D
ESCRIPTIONS
Number
1, 6
2, 3
4
5
7, 8
Name
V
CC
XTAL_OUT,
XTAL_IN
V
EE
PWR_DN
nQ0, Q0
Power
Input
Power
Input
Output
Pullup
Type
Description
Core supply pin.
Crystal oscillator interface. XTAL_IN is the input,
XTAL_OUT is the output.
Negative supply pin.
Output state control input. High impedance when LOW (oscillator stops).
LVCMOS/LVTTL interface levels.
Differential clock outputs. LVPECL interface levels.
NOTE:
Pullup
refers to internal input resistors. See Table 2, Pin Characterristics, for typical values.
T
ABLE
2. P
IN
C
HARACTERISTICS
Symbol
C
IN
R
PULLUP
Parameter
Input Capacitance
Input Pullup Resistor
Test Conditions
Minimum
Typical
4
51
Maximum
Units
pF
kΩ
843031 REVISION A 11/5/15
2
©2015
Integrated Device Technology, Inc.
843031 Data Sheet
FEMTOCLOCK
®
CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
CC
Inputs, V
I
Outputs, I
O
Continuous Current
Surge Current
Package Thermal Impedance,
θ
JA
Storage Temperature, T
STG
4.6V
-0.5V to V
CC
+ 0.5V
50mA
100mA
101.7°C/W (0 mps)
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions
beyond those listed in the
DC Characteristics
or
AC Charac-
teristics
is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
T
ABLE
3A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, T
A
=0°C
TO
70°C
Symbol
V
CC
I
EE
Parameter
Core Supply Voltage
Power Supply Current
PWR_DN = 1
PWR_DN = 0
Test Conditions
Minimum
3.135
Typical
3.3
Maximum
3.465
105
<1
Units
V
mA
mA
T
ABLE
3B. LVCMOS/LVTTL DC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, T
A
=0°C
TO
70°C
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
PWR_DN
PWR_DN
V
CC
= V
IN
= 3.465V
V
CC
= 3.465V, V
IN
= 0V
-150
Test Conditions
Minimum
2
-0.3
Typical
Maximum
V
CC
+ 0.3
0.8
5
Units
V
V
µA
µA
T
ABLE
3C. LVPECL DC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, T
A
=0°C
TO
70°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
Test Conditions
Minimum
V
CC
- 1.4
V
CC
- 2.0
0.6
Typical
Maximum
V
CC
- 0.9
V
CC
- 1.7
1.0
Units
V
V
V
NOTE 1: Outputs terminated with 50Ω to V
CC
- 2V.
843031 REVISION A 11/5/15
3
©2015
Integrated Device Technology, Inc.
843031 Data Sheet
FEMTOCLOCK
®
CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR
T
ABLE
4. C
RYSTAL
C
HARACTERISTICS
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
Drive Level
12
Test Conditions
Minimum
Typical
Fundamental
40
50
7
1
MHz
Ω
pF
mW
Maximum
Units
T
ABLE
5. AC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, T
A
=0°C
TO
70°C
Symbol
f
OUT
tjit(Ø)
t
R
/ t
F
odc
Parameter
Output Frequency
RMS Phase Jitter (Random);
NOTE 1
Output Rise/Fall Time
Output Duty Cycle
312.5MHz, Integration Range:
1.875MHz to 20MHz
318.75MHz, Integration Range:
1.875MHz to 20MHz
20% to 80%
200
46
Test Conditions
Minimum
290
0.475
0.475
600
54
Typical
Maximum
350
Units
MHz
ps
ps
ps
%
NOTE 1: Please refer to the Phase Noise Plot.
843031 REVISION A 11/5/15
4
©2015
Integrated Device Technology, Inc.
843031 Data Sheet
FEMTOCLOCK
®
CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR
T
YPICAL
P
HASE
N
OISE AT
312.5MH
Z
-30
-40
-50
-60
-70
-80
-90
-100
➤
1 Gigabit Ethernet Filter
312.5MHz
RMS Phase Jitter (Random)
1.875Mhz to 20MHz = 0.475ps (typical)
0
-10
-20
N
OISE
P
OWER
dBc
Hz
Raw Phase Noise Data
➤
-110
-120
-130
-140
-150
-160
-170
-180
-190
100
1k
➤
10k
Phase Noise Result by adding 1
Gigabit Ethernet Filter to raw data
100k
1M
10M
100M
O
FFSET
F
REQUENCY
(H
Z
)
T
YPICAL
P
HASE
N
OISE AT
318.75MH
Z
0
-10
-20
-30
-40
-50
➤
1 Gigabit Ethernet Filter
318.75MHz
RMS Phase Jitter (Random)
1.875Mhz to 20MHz = 0.475ps (typical)
N
OISE
P
OWER
dBc
Hz
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
-190
100
Raw Phase Noise Data
➤
1k
10k
➤
Phase Noise Result by adding 1
Gigabit Ethernet Filter to raw data
100k
1M
10M
100M
O
FFSET
F
REQUENCY
(H
Z
)
843031 REVISION A 11/5/15
5
©2015
Integrated Device Technology, Inc.
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
