电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

SMBG5334CE3/TR13

产品描述diode zener 5W 3.6V 2% smbg
产品类别分立半导体    二极管   
文件大小397KB,共5页
制造商Microsemi
官网地址https://www.microsemi.com
标准
下载文档 详细参数 全文预览

SMBG5334CE3/TR13概述

diode zener 5W 3.6V 2% smbg

SMBG5334CE3/TR13规格参数

参数名称属性值
是否Rohs认证符合
厂商名称Microsemi
包装说明R-PDSO-G2
Reach Compliance Codecompliant
ECCN代码EAR99
配置SINGLE
二极管元件材料SILICON
二极管类型ZENER DIODE
JEDEC-95代码DO-215AA
JESD-30 代码R-PDSO-G2
JESD-609代码e3
湿度敏感等级1
元件数量1
端子数量2
最高工作温度150 °C
最低工作温度-65 °C
封装主体材料PLASTIC/EPOXY
封装形状RECTANGULAR
封装形式SMALL OUTLINE
峰值回流温度(摄氏度)NOT SPECIFIED
极性UNIDIRECTIONAL
最大功率耗散1.38 W
标称参考电压3.6 V
表面贴装YES
技术ZENER
端子面层MATTE TIN
端子形式GULL WING
端子位置DUAL
处于峰值回流温度下的最长时间NOT SPECIFIED
最大电压容差2%
工作测试电流350 mA

文档预览

下载PDF文档
SMBJ5333B thru SMBJ5388B
Available
Surface Mount Silicon 5 Watt
Zener Diodes
DESCRIPTION
The SMBJ5333B - SMBJ5388B series of surface mount 5.0 watt Zeners provides a selection
from 3.3 to 200 volts with different tolerances as identified by suffix letter on the part number.
It is equivalent to the JEDEC registered 1N5333 thru 1N5388B with identical electrical
characteristics and testing. These parts are available with either Sn/Pb plating or a RoHS
compliant matte-tin finish. This J-bend design (SMBJ) in the DO-214AA allows for greater PC
board mounting density. These plastic encapsulated Zeners have a moisture classification of
“Level 1” with no dry pack required. Microsemi also offers numerous other Zener products to
meet higher and lower power applications.
Important:
For the latest information, visit our website
http://www.microsemi.com.
DO-214AA
J-Bend Package
NOTE: All SMB series are
equivalent to prior SMS package
identifications.
FEATURES
Surface mount equivalent to JEDEC registered 1N5333 thru 1N5388 series.
Ideal for high-density and low-profile mounting.
Zener voltage available 3.3 V to 200 V.
Plus/minus 10%, 5% and 2% voltage tolerances are available.
(See
part nomenclature
block.)
RoHS compliant versions available.
Also available in:
DO-215AA Package
(Gull-wing surface mount)
SMBG5333 – SMBG5388
T-18 Package
(axial-leaded)
1N5333 – 1N5388
APPLICATIONS / BENEFITS
Regulates voltage over broad operating current and temperature ranges.
Wide selection from 3.3 to 200 V.
Non-sensitive to ESD per MIL-STD-750 method 1020.
Withstands high surge stresses.
Minimal changes of voltage versus current.
High specified maximum current (I
ZM
) with adequate heat sinking.
Moisture classification is “Level 1” per IPC/JEDEC J-STD-020B with no dry pack required.
MAXIMUM RATINGS
Parameters/Test Conditions
Junction and Storage Temperature
Thermal Resistance Junction-to-Lead
(1)
Thermal Resistance Junction-to-Ambient
o (2)
Off-State Power Dissipation @ 25 C
Forward Voltage @ 1.0 A
Solder Temperature @ 10 s
Symbol
T
J
and T
STG
R
ӨJL
R
ӨJA
P
D
V
F
T
SP
Value
-65 to +150
25
90
5.0
1.2
260
Unit
C
C/W
o
C/W
W
V
o
C
o
o
MSC – Lawrence
6 Lake Street,
Lawrence, MA 01841
Tel: 1-800-446-1158 or
(978) 620-2600
Fax: (978) 689-0803
MSC – Ireland
Gort Road Business Park,
Ennis, Co. Clare, Ireland
Tel: +353 (0) 65 6840044
Fax: +353 (0) 65 6822298
Website:
www.microsemi.com
Notes:
1. When mounted on FR4 PC board (1oz Cu) with recommended footprint (see
pad layout).
2. 5 watts at T
L
< 25
o
C, or 1.38 watts at T
A
= 25
º
C when mounted on FR4 PC board with recommended
footprint (also see
Figure 1).
T4-LDS-0246-2, Rev. 1 (120180)
©2012 Microsemi Corporation
Page 1 of 5
WinCE5.0支持、使用64G这么大的CF卡或MMC、SD卡
请问各位WinCE开发的同仁: 有没有WinCE5.0支持、使用64G这么大的CF卡或MMC、SD卡的成功应用?...
jjnature 嵌入式系统
6701编译问题
小弟今日编写6701,其中CMD文件如下: -c -heap 0x1000 -stack ......
coldsun1982 DSP 与 ARM 处理器
通用的串口VHDL 源程序设计
第一部分: 串口接收程序 LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;USE IEEE.STD_LOGIC_ARITH.ALL;USE IEEE.STD_LOGIC_UNSIGNED.ALL; --LIBRARY ALTERA;--USE ALTERA.MAXPLUS2.ALL; LIBRARY ......
eeleader FPGA/CPLD
下周去百度面试,求指点 求教育 求指正 求帮助 求关心
本帖最后由 astwyg 于 2014-5-22 21:29 编辑 本来是帮同学传达消息,投了个百度质量部实习,没想到下午给我打电话让我去面试了.. 投的岗位是测试开发,比较关注的两个具体岗位是开发网页搜索 ......
astwyg 聊聊、笑笑、闹闹
求助:FPGA与DSP通信问题
FPGA采用DSP的xintf接口与DSP通信,看了不少资料,但还是很迷茫,说要使FPGA的时序与DSP一致,要怎么实现一致呢? 看到有说在FPGA中建立双口RAM或者FIFO的,就简单地FPGA检测到XWE就将数据送到 ......
djky183 FPGA/CPLD
晒WEBENCH设计的过程+低通滤波器设计方案
之前了解WEBENCH设计针对是电源的设计,现在看了看功能强大了许多,现在就用该工具设计一个低通滤波器电路,电路图如下:通过图形很容易的看到频响的曲线等,电阻和电容的BOM清单也有具体的型号 ......
hanskying666 模拟与混合信号

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 2295  1135  2332  967  2648  5  38  41  50  6 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved