A3992
DMOS Dual Full-Bridge Microstepping PWM Motor Driver
Features and Benefits
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±1.5 A, 50 V continuous output rating
Low R
DS(on)
DMOS output drivers
Short-to-ground protection
Shorted load protection
Optimized microstepping via six bit linear DACs
Programmable mixed, fast, and slow current decay modes
4 MHz internal oscillator for digital timing
Serial interface controls chip functions
Synchronous rectification for low power dissipation
Internal UVLO and thermal shutdown circuitry
Crossover-current protection
Inputs compatible with 5 or 3.3 V control signals
Sleep and Idle modes
Description
Designed for pulse width modulated (PWM) current control of
bipolar microstepped stepper motors, the A3992 is capable of
continuous output currents to ±1.5 A and operating voltages to
50 V. Internal fixed off-time PWM current control timing circuitry
can be programmed via the serial interface to operate in slow, fast,
or mixed decay modes.
The desired load current level is set via the serial port with two
six bit linear DACs in conjunction with a reference voltage. The
six bits of control allow maximum flexibility in torque control for
a variety of step methods, from microstepping to full step drive.
Load current is set in 1.56% increments of the maximum value.
Synchronous rectification circuitry allows the load current to flow
through the low R
DS(on)
of the DMOS output driver during current
decay. This feature eliminates the need for external clamp diodes
in most applications, saving cost and external component count,
while minimizing power dissipation.
Internal circuit protection includes short-to-ground, shorted load,
thermal shutdown with hysteresis, and crossover current protection.
Special power up sequencing is not required.
The A3992 is supplied in a thin profile (1.2 mm maximum height)
24 pin TSSOP (suffix LP) with exposed thermal pad and a 24 pin
plastic DIP with dual copper batwing tabs (suffix B). The exposed
thermal pad on the LP is at ground potential and needs no electrical
isolation. Both packages are lead (Pb) free with 100% matte tin
leadframe plating.
Packages
24 pin batwing DIP (suffix B) and 24 pin TSSOP with
exposed thermal pad (suffix LP)
LP package approximate scale
Typical Application
0.22
μF
VREG
10
μF
5 kΩ
Microcontroller or
Controller Logic
ROSC
CLOCK
DATA
STROBE
REF
SLEEP
VDD
0.22
μF
CP1
CP2
VCP
0.22
μF
VBB1
A3992
VBB2
OUT1A
OUT1B
SENSE1
100
μF
0.1
μF
OUT2A
OUT2B
SENSE2
0.1
μF
3992DS, Rev. 2
A3992
DMOS Dual Full-Bridge
Microstepping PWM Motor Driver
Selection Guide
Part Number
A3992SB-T
A3992SLPTR-T
Packing
15 pieces/tube
Tape, 4000 pieces/reel
Package
24 pin batwing DIP
24 pin TSSOP with
exposed thermal pad
Absolute Maximum Ratings
Characteristic
Load Supply Voltage
Output Current
Logic Supply Voltage
Logic Input Voltage Range
VBBx to OUTx Voltage
OUTx to SENSEx Voltage
REF Reference Voltage
SENSE Voltage (DC)
Operating Ambient Temperature
Maximum Junction Temperature
Storage Temperature
V
REF
V
SENSE
T
A
T
J
(max)
T
stg
Range S
Symbol
V
BB
I
OUT
V
DD
V
IN
Output current rating may be limited by duty cycle, ambient
temperature, and heat sinking. Under any set of conditions, do
not exceed the specified current rating or a junction tempera-
ture of 150°C.
Notes
Rating
50
±1.5
7.0
–0.3 to 7
50
50
3
500
–20 to 85
150
–55 to 150
Units
V
A
V
V
V
V
V
mV
ºC
ºC
ºC
Thermal Characteristics*
Characteristic
Symbol
Notes
B package on 4-layer PCB
B package on 2-layer PCB with 3.15 in.
2
2 oz. copper each side
LP package on 4-layer PCB
LP package on 2-layer PCB with 3.8 in.
2
2 oz. copper each side
*Additional thermal data available on the Allegro website.
Rating
26
36
28
32
Units
°C/W
°C/W
°C/W
°C/W
Package Thermal Resistance
R
θJA
Allegro MicroSystems, LLC
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
2
A3992
DMOS Dual Full-Bridge
Microstepping PWM Motor Driver
Functional Block Diagram
0.22 µF
0.22 µF
VREG
2V
VDD
UVLO and
Fault
Detect
Regulator
Bandgap
CP2
CP1
Charge
Pump
VCP
MUX
0.22 µF
To VDD
6 Bit
Linear DAC
V
CP
DMOS Full Bridge 1
VBB1
>47 µF
Internal
Oscillator
OSC
OSC Select/
Divider
OUT1A
Programmable
PWM Timer
Fixed-Off
Blank
Mixed Decay
Gate
Drive
OUT1B
SENSE1
OCP
CLOCK
To VDD
DATA
STROBE
SLEEP
Serial Port
Control
Logic
Phase 1,2
Sync Rect Mode
Sync Rect Disable
Mode 1, 2
DMOS Full Bridge 2
VBB2
OUT2A
OUT2B
Programmable
PWM Timer
To 2V
V
REF
Fixed-Off
Blank
Mixed Decay
Buffer
6 Bit
Linear DAC
SENSE2
0.1 µF
REF
Allegro MicroSystems, LLC
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
3
A3992
DMOS Dual Full-Bridge
Microstepping PWM Motor Driver
ELECTRICAL CHARACTERISTICS
1
valid at T
A
= 25°C, V
BB
= 50 V, f
PWM
< 50 kHz, unless otherwise noted
Characteristic
Symbol
Test Conditions
Min.
Typ.
2
Max.
Units
Output Drivers
Operating, I
OUT
= ±1.5 A
15
–
50
V
Load Supply Voltage Range
V
BB
During Sleep mode
0
–
50
V
V
OUT
= V
BB
–
<1.0
50
μA
Output Leakage Current
I
DSS
–
<–1.0
–50
μA
V
OUT
= 0 V
Source driver, I
OUT
= -1.5 A
–
0.54
0.6
Ω
Output On Resistance
R
DS(on)
Sink driver, I
OUT
= 1.5 A
–
0.54
0.6
Ω
Source diode, I
F
= -1.5 A
–
–
1.2
V
Body Diode Forward Voltage
V
F
Sink diode, I
F
= 1.5 A
–
–
1.2
V
f
PWM
< 50 kHz
–
–
8
mA
Motor Supply Current
I
BB
Operating, outputs disabled
–
–
6
mA
Sleep or Idle mode
–
–
20
μA
f
PWM
< 50 kHz
–
–
12
mA
Outputs off
–
–
10
mA
Logic Supply Current
I
DD
Idle mode (Word 1, D18 = 0)
–
–
1.5
mA
Sleep mode
–
–
100
μA
Control Logic
Logic Supply Voltage Range
V
DD
Operating
4.5
5
5.5
V
V
IN(1)
2.0
–
–
V
Logic Input Voltage
V
IN(0)
–
–
0.8
V
I
IN(1)
V
IN
= 2.0 V
–
<1.0
20
μA
Logic Input Current
I
IN(0)
V
IN
= 0.8 V
–
<–2.0
–20
μA
Input Hysteresis
0.20
–
0.40
V
>2
–
–
μs
Minimum sleep pulse width
t
S
OSC input frequency
f
OSC(in)
Divide by 1 (Word 2, D13=0, D14=1)
2.5
–
6
MHz
OSC input duty cycle
40
–
60
%
OSC shorted to GND
3
4
5
MHz
Internal Oscillator
f
OSC
R
OSC
= 51 kΩ
3.4
4
4.6
MHz
DAC Accuracy
V
DAC
Measured relative to REF buffer output
–
±0.5
–
LSB
Reference Input Voltage Range
.5
–
2.6
V
Reference Buffer Offset
V
OS
–
±10
–
mV
Word 0, D18 = 0, D17 = 1, V
REF
= 0.5 to 2.6 V
7.4
8
8.8
–
Reference Divider Ratio
V
REF
/V
SENSE
3.6
4
4.4
–
Word 0, D18 = 1, D17 = 1, V
REF
=0.5 to 2.6 V
Reference Input Current
I
REF
V
REF
= 2.0 V
–0.5
–
0.5
μA
1.940
2.0
2.060
V
Internal Reference Voltage
V
REFINT
Comparator Input Offset Volt.
V
IO
V
REF
= 0 V
–5
0
5
mV
Internal V
REF
, Range = 8, DAC = 63
–6
0
6
%
Internal V
REF
, Range = 8, DAC = 31
–9
0
9
%
G
M
Error
3
V
ERR
–6
0
6
%
Internal V
REF
, Range = 4, DAC = 63
Internal V
REF
, Range = 4, DAC = 15
–10
0
10
%
50% to 90%; PWM change to source on
500
800
1000
ns
50% to 90%; PWM change to source off
35
–
250
ns
Propagation Delay Times
tpd
50% to 90%; PWM change to sink on
500
800
1000
ns
50% to 90%; PWM change to sink off
35
–
250
ns
Crossover Dead Time
t
DT
300
650
900
ns
V
DD
rising
3.9
4.2
4.45
V
UVLO Enable Threshold
V
UVLO
UVLO Hysteresis
V
UVLOHYS
0.05
0.10
–
V
Protection Circuitry
Overcurrent Protection Threshold
4
I
OCPST
2
–
–
A
Overcurrent Blanking
t
OCP
1
–
3
μs
Thermal Shutdown Temperature
T
J
–
165
–
°C
Thermal Shutdown Hysteresis
T
JHYS
–
15
–
°C
1
Negative current is defined as coming out of (sourcing) the specified device pin.
2
Typical data are for initial design estimations only, and assume optimum manufacturing and application conditions. Performance may vary for
individual units, within the specified maximum and minimum limits.
3
V
ERR
= [(V
REF
/ Range) – V
SENSE
] / (V
REF
/ Range).
4
OCP is tested at T = 25°C in a restricted range and guaranteed by characterization.
A
Allegro MicroSystems, LLC
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
4
A3992
DMOS Dual Full-Bridge
Microstepping PWM Motor Driver
Serial Interface Description
D7 – 12 Bridge 2 Linear DAC.
6 bit word to set the
The A3992 is controlled via a 3 wire serial port. The
programmable functions allow maximum
fl
exibility in
configuring the PWM to the motor drive requirements.
The serial data is written as two 19 bit words, 1 bit
to select which word (referred to here as
Word 0
and
Word 1)
and 18 bits of data. The serial port is defined
in the following tables and text descriptions.
Word 0 Bit Assignments
desired current level for bridge 2. Setting all bits to
zero disables Full Bridge 2, all drivers off. (See Cur-
rent Regulation in the Functional Description section.)
D13 Bridge 1 Phase.
This bit controls the direction
of current for motor phase 1 as defined below:
D13
0
1
OUT1A
L
H
OUT1B
H
L
Word 0 is selected by setting D0 = 0. Assignments are
summarized in the following table, and described in
detail in the remainder of this section.
Word 0 Bit Assignments
Bit
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
Function
Word Select = 0
Bridge 1, DAC, LSB
Bridge 1, DAC, Bit2
Bridge 1, DAC, Bit3
Bridge 1, DAC, Bit4
Bridge 1, DAC, Bit 5
Bridge 1, DAC, MSB
Bridge 2, DAC, LSB
Bridge 2, DAC, Bit2
Bridge 2, DAC, Bit3
Bridge 2, DAC, Bit4
Bridge 2, DAC, Bit 5
Bridge 2, DAC, MSB
Bridge 1 Phase
Bridge 2 Phase
Bridge 1 Mode
Bridge 2 Mode
Reference Select
Range Select
D14 Bridge 2 Phase.
This bit controls the direction
of current for motor phase 2 as defined below:
D14
0
1
OUT2A
L
H
OUT2B
H
L
D15 Bridge 1 Mode.
This bit determines the decay
for Full Bridge 1 as defined below:
D15
0
1
Mode
Mixed Decay
Slow Decay
D16 Bridge 2 Mode.
This bit determines the decay
for Full Bridge 2 as defined below:
D16
0
1
Mode
Mixed Decay
Slow Decay
D17 Ref Select.
This bit determines the reference
input for the two 6 bit linear DACs. Logic low selects
internal 2 V reference voltage, logic high selects ex-
ternal reference input on the REF pin.
D18 G
m
Range Select.
D18 determines if the scaling
D1 – D6 Bridge 1, Linear DAC.
6 bit word to set de-
factor used is 4 or 8:
D18
0
1
Divider
÷8
÷4
Load Current
I
TRIP
=
V
DAC
/(R
SENSE
× 8)
I
TRIP
=
V
DAC
/(R
SENSE
× 4)
sired current level for bridge 1. Setting all bits to zero
disables Full Bridge 1, all drivers off. (See Current
Regulation in the Functional Description section.)
Allegro MicroSystems, LLC
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
5
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