INTEGRATED CIRCUITS
CBTD3384
10-bit level shifting bus switch
with 5-bit output enables
Product data
Supersedes data of 2000 Aug 30
File under Integrated Circuits — ICL03
2001 Dec 20
Philips
Semiconductors
Philips Semiconductors
Product data
10-bit level shifting bus switch
with 5-bit output enables
CBTD3384
FEATURES
•
5
Ω
switch connection between two ports
•
TTL compatible control input and output levels
•
Designed to be used in 5 V to 3.3 V level shifting applications
•
Latch-up protection exceeds 500 mA per JESD78
•
ESD protection exceeds 2000 V HBM per JESD22-A114, and
1000 V CDM per JESD22-C101
PIN CONFIGURATION
1OE
1B1
1A1
1A2
1B2
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Vcc
2B5
2A5
2A4
2B4
2B3
2A3
2A2
2B2
2B1
2A1
2OE
DESCRIPTION
The CBTD3384 provides ten bits of high-speed TTL-compatible
level shifting bus switching. The low on-state resistance of the
switch allows connections to be made with minimal propagation
delay. The gate voltage of the enabled switch is lowered by a diode
to allow convenient level shifting between 5 V and 3.3 V levels on
either side of the CBTD3384.
The CBTD3384 device is organized as two 5-bit bus switches with
separate output-enable (OE) inputs. When OE is low, the switch is
on and port A is connected to B. When OE is high, the switch is
open and high-impedance state exists between the two ports.
The CBTD3384 is characterized for operation from –40 to +85
°C.
1B3
1A3
1A4
1B4
1B5
1A5
GND
SA00502
PIN DESCRIPTION
PIN NUMBER
1, 13
3, 4, 7, 8, 11
14, 17, 18, 21, 22
2, 5, 6, 9, 10
15, 16, 19, 20, 23
12
24
SYMBOL
1OE, 2OE
1A1–1A5
2A1–2A5
1B1–1B5
2B1–2B5
GND
V
CC
NAME AND FUNCTION
Output enables
Inputs
Inputs
Outputs
Outputs
Ground (0V)
Positive supply voltage
QUICK REFERENCE DATA
SYMBOL
t
PLH
t
PHL
C
IN
C
OUT
I
CCZ
PARAMETER
Propagation delay
An to Yn
Input capacitance
Output capacitance
Total supply current
CONDITIONS
T
amb
= 25
°C;
GND = 0 V
C
L
= 50 pF; V
CC
= 5 V
V
I
= 0 V or V
CC
Outputs disabled; V
O
= 0 V or V
CC
Outputs disabled; V
CC
= 5.5 V
TYPICAL
250
3
6
0.2
UNIT
ps
pF
pF
µA
ORDERING INFORMATION
PACKAGES
24-Pin Plastic SO
24-Pin Plastic SSOP
24-Pin Plastic SSOP (QSOP)
TEMPERATURE RANGE
–40 to +85
°C
–40 to +85
°C
–40 to +85
°C
ORDER CODE
CBTD3384D
CBTD3384DB
CBTD3384DK
DWG NUMBER
SOT137-1
SOT340-1
SOT556-1
SOT355-1
24-Pin Plastic TSSOP
–40 to +85
°C
CBTD3384PW
Standard packing quantities and other packaging data is available at www.philipslogic.com/packaging.
2001 Dec 20
2
853-2215 27501
Philips Semiconductors
Product data
10-bit level shifting bus switch
with 5-bit output enables
CBTD3384
LOGIC SYMBOL
1A1
3
2
1B1
FUNCTION TABLE
INPUTS
1OE
L
2OE
L
H
L
H
OUTPUTS
1A, 1B
1A = 1B
1A = 1B
Z
Z
2A, 2B
2A= 2B
Z
2A = 2B
Z
1A5
11
10
1B5
L
H
H
1OE
1
2A1
14
15
2B1
H = High voltage level
L = Low voltage level
Z = High impedance “off ” state
2A5
22
23
2B5
2OE
13
SA00544
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
V
CC
I
IK
V
I
I
SW
T
stg
PARAMETER
DC supply voltage
DC input diode current
DC input voltage
3
DC output diode current
Storage temperature range
V
O
< 0
CONDITIONS
RATING
–0.5 to +7.0
–50
–1.2 to +7.0
±128
–65 to +150
UNIT
V
mA
V
mA
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150
°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
CC
V
IH
V
IL
T
amb
DC supply voltage
High-level input voltage
Low-level Input voltage
Operating free-air temperature range
PARAMETER
LIMITS
Min
4.5
2.0
—
–40
Max
5.5
—
0.8
+85
UNIT
V
V
V
°C
2001 Dec 20
3
Philips Semiconductors
Product data
10-bit level shifting bus switch
with 5-bit output enables
CBTD3384
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
V
IK
V
OH
I
I
I
CC
∆I
CC
C
I
C
I(OFF)
r
on3
PARAMETER
Input clamp voltage
Output high pass voltage
Input leakage current
Quiescent supply current
2
Additional supply current per
input pin
2
Control pins
Port off capacitance
On-resistance
TEST CONDITIONS
V
CC
= 4.5 V; I
I
= –18 mA
See Figure 1
V
CC
= 5.5 V; V
I
= GND or 5.5 V
V
CC
= 5.5 V; I
O
= 0, V
I
= V
CC
or GND;
1OE=2OE=GND
V
CC
= 5.5 V, one input at 3.4 V, other inputs at
V
CC
or GND
V
I
= 3 V or 0
V
O
= 3 V or 0, OE = V
CC
V
CC
= 4.5 V; V
I
= 0 V; I
I
= 64 mA
V
CC
= 4.5 V; V
I
= 0 V; I
I
= 30 mA
V
CC
= 4.5 V; V
I
= 2.4 V; I
I
= –15 mA
T
amb
= –40
°C
to +85
°C
Min
—
—
—
—
—
—
—
—
—
—
Typ
1
—
—
—
—
—
3.2
6
5
5
17
Max
–1.2
—
±1
1.5
2.5
—
—
7
7
50
Ω
V
V
µA
mA
mA
pF
pF
UNIT
NOTES:
1. All typical values are at V
CC
= 5 V, T
amb
= 25
°C
2. This is the increase in supply current for each input that is at the specified TTL voltage level rather than V
CC
or GND
3. Measured by the voltage drop between the A and the B terminals at the indicated current through the switch. On-state resistance is
determined by the lowest voltage of the two (A or B) terminals.
AC CHARACTERISTICS
GND = 0 V; t
R
= t
F
= 2.5 nS
;
C
L
= 50 pF
LIMITS
SYMBOL
PARAMETER DESCRIPTION
Min
t
pd
t
PZH
t
PHZ
t
PZL
t
PLZ
Propagation delay
1
Output enable time to High level
Output disable time from High level
Output enable time to Low level
Output disable time from Low level
—
2.3
1.7
2.3
1.7
–40
°C
to +85
°C
V
CC
= 5 V
±
0.5 V
Mean
—
4.3
2.4
4.9
4.2
Max
250
7.0
5.3
7.5
5.3
ps
ns
ns
ns
ns
UNIT
NOTE:
1. This parameter is warranted but not production tested. The propagation delay is based on the RC time constant of the typical on-state
resistance of the switch and a load capacitance of 50 pF, when driven by an ideal voltage source (zero output impedance).
2001 Dec 20
4
Philips Semiconductors
Product data
10-bit level shifting bus switch
with 5-bit output enables
CBTD3384
AC WAVEFORMS
V
M
= 1.5 V, V
IN
= GND to 3.0 V
3V
1.5 V
INPUT
0V
t
PLH
t
PHL
V
OH
1.5 V
OUTPUT
V
OL
1.5 V
1.5 V
TEST CIRCUIT AND WAVEFORMS
7V
From Output
Under Test
C
L
= 50 pF
500
Ω
S1
Open
GND
500
Ω
Load Circuit
TEST
t
pd
t
PLZ
/t
PZL
t
PHZ
/t
PZH
S1
open
7V
open
SA00028
Waveform 1. Input (An) to Output (Yn) Propagation Delays
DEFINITIONS
Load capacitance includes jig and probe capacitance;
C
L
=
see AC CHARACTERISTICS for value.
3V
Output Control
(Low-level
enabling )
t
PZL
Output
Waveform 1
S1 at 7 V
(see Note)
t
PZH
Output
Waveform 2
S1 at Open
(see Note)
SA00012
1.5 V
1.5 V
0V
3.5 V
1.5 V
t
PHZ
V
OH
– 0.3 V
1.5 V
0V
t
PLZ
NOTES:
1. All input pulses are supplied by generators having the following
characteristics: PRR
≤
10MHz, Z
O
= 50
Ω,
t
r
≤
2.5 ns, t
f
≤
2.5 ns.
2. The outputs are measured one at a time with one transition per
measurement.
V
OL
+ 0.3 V
V
OL
V
OH
Note:
Waveform 1 is for an output with internal conditions such that
the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that
the output is high except when disabled by the output control.
SA00029
Waveform 2. 3-State Output Enable and Disable Times
2001 Dec 20
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
