CBT3306-Q100
Dual bus switch
Rev. 1 — 4 April 2013
Product data sheet
1. General description
The CBT3306-Q100 dual FET bus switch features independent line switches. Each switch
is disabled when the associated output enable (nOE) input is HIGH.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 3) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 3)
Specified from
40 C
to +85
C
5
switch connection between two ports
TTL-compatible input levels
Multiple package options
Latch-up protection exceeds 100 mA per JESD78B
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
3. Ordering information
Table 1.
Ordering information
Package
Name
CBT3306D-Q100
CBT3306PW-Q100
SO8
TSSOP8
Description
plastic small outline package; 8 leads; body width 3.9 mm
plastic thin shrink small outline package; 8 leads;
body width 4.4 mm
Version
SOT96-1
SOT530-1
Type number
NXP Semiconductors
CBT3306-Q100
Dual bus switch
4. Functional diagram
2
1
5
7
002aab985
1A
1OE
2A
2OE
3
1B
6
2B
Fig 1.
Logic diagram
5. Pinning information
5.1 Pinning
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2(
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%
*1'
DDD
9
&&
2(
%
$
2(
$
%
*1'
&%74
DDD
9
&&
2(
%
$
Fig 2.
Pin configuration for SO8 (SOT96-1)
Fig 3.
Pin configuration for TSSOP8 (SOT530-1)
5.2 Pin description
Table 2.
Symbol
1OE, 2OE
1A, 2A
1B, 2B
GND
V
CC
Pin description
Pin
1, 7
2, 5
3, 6
4
8
Description
output enable input
data input/output (A port)
data input/output (B port)
ground (0 V)
positive supply voltage
6. Functional description
Table 3.
Input
nOE
L
H
[1]
Function selection
[1]
Input/output
nA, nB
nA = nB
Z
H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
CBT3306_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 4 April 2013
2 of 12
NXP Semiconductors
CBT3306-Q100
Dual bus switch
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
[1]
T
amb
=
40
C to +85
C, unless otherwise specified.
Symbol
V
CC
V
I
I
O
I
IK
T
stg
[1]
Parameter
supply voltage
input voltage
output current
input clamping current
storage temperature
Conditions
[2]
Min
0.5
0.5
-
50
65
Max
+7.0
+7.0
128
-
+150
Unit
V
V
mA
mA
C
V
I/O
= 0 V
Stresses beyond the listed limits may damage the device permanently. These ratings are stress ratings only and functional operation of
the device at or beyond the conditions indicated under
Section 8.
is not implied. Exposure to absolute-maximum-rated conditions for
extended periods may affect device reliability.
The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
[2]
8. Recommended operating conditions
Table 5.
Operating conditions
All unused control inputs of the device must be held at V
CC
or GND to ensure proper device operation.
Symbol
V
CC
V
IH
V
IL
T
amb
Parameter
supply voltage
HIGH-level input voltage
LOW-level input voltage
ambient temperature
operating in free air
Conditions
Min
4.5
2.0
-
40
Typ
-
-
-
-
Max
5.5
-
0.8
+85
Unit
V
V
V
C
CBT3306_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 4 April 2013
3 of 12
NXP Semiconductors
CBT3306-Q100
Dual bus switch
9. Static characteristics
Table 6.
Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol
V
IK
I
I
I
CC
V
pass
I
CC
Parameter
input clamping voltage
input leakage current
supply current
pass voltage
additional supply current
Conditions
V
CC
= 4.5 V; I
I
=
18
mA
V
CC
= 5.5 V; V
I
= GND or 5.5 V
V
CC
= 5.5 V; I
O
= 0 mA;
V
I
= V
CC
or GND
output HIGH; V
I
= V
CC
= 5.0 V;
I
O
=
100 A
per input pin; V
CC
= 5.5 V;
one input at 3.4 V, other inputs at
V
CC
or GND
control pin; V
I
= 3 V or 0 V
port off; V
I
= 3 V or 0 V; nOE = V
CC
V
CC
= 4.5 V; V
I
= 0 V; I
I
= 64 mA
V
CC
= 4.5 V; V
I
= 0 V; I
I
= 30 mA
V
CC
= 4.5 V; V
I
= 2.4 V; I
I
= 15 mA
[1]
[2]
[3]
All typical values are at V
CC
= 5 V, T
amb
= 25
C.
This is the increase in supply current for each input that is at the specified TTL voltage level rather than V
CC
or GND.
Measured by the voltage drop between the nA and the nB terminals at the indicated current through the switch. ON resistance is
determined by the lowest voltage of the two (nA, nB) terminals.
[3]
[3]
[3]
[2]
T
amb
=
40 C
to +85
C
Min
-
-
-
3.6
-
Typ
[1]
-
-
-
3.9
-
Max
1.2
1
3
4.2
2.5
Unit
V
A
A
V
mA
C
I
C
io(off)
R
ON
input capacitance
off-state input/output
capacitance
ON resistance
-
-
-
-
-
3.15
6.45
3.4
3.4
6.8
-
-
5
5
15
pF
pF
10. Dynamic characteristics
Table 7.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see
Figure 6.
Symbol
t
pd
t
en
t
dis
Parameter
propagation delay
enable time
disable time
Conditions
nA, nB to nB, nA; see
Figure 4
V
CC
= 5.0 V
0.5 V
nOE to nA, nB; see
Figure 5
V
CC
= 5.0 V
0.5 V
nOE to nA, nB; see
Figure 5
V
CC
= 5.0 V
0.5 V
[1]
[2]
The propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specified load capacitance,
when driven by an ideal voltage source (zero output impedance).
t
pd
is the same as t
PLH
and t
PHL
.
t
en
is the same as t
PZL
and t
PZH
.
t
dis
is the same as t
PLZ
and t
PHZ
.
[2]
[2]
[1][2]
T
amb
=
40 C
to +85
C
Min
-
1.0
1.0
Typ
-
-
-
Max
0.25
5.0
5.0
Unit
ns
ns
ns
CBT3306_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 4 April 2013
4 of 12
NXP Semiconductors
CBT3306-Q100
Dual bus switch
11. Waveforms
V
I
nA, nB
input
GND
t
PHL
V
OH
nB, nA
output
V
OL
V
M
001aak305
V
M
t
PLH
Measurement points are given in
Table 8.
Logic levels: V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 4.
The data input (nA, nB) to output (nB, nA) propagation delay times
V
I
nOE input
GND
t
PLZ
t
PZL
V
M
V
M
3.5 V
output
LOW to OFF
OFF to LOW
V
OL
t
PHZ
V
OH
output
HIGH to OFF
OFF to HIGH
GND
outputs
enabled
outputs
disabled
outputs
enabled
001aak298
V
M
V
X
t
PZH
V
Y
V
M
Measurement points are given in
Table 8.
Logic levels: V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 5.
Table 8.
V
CC
Enable and disable times
Measurement points
Input
V
I
GND to 3.0 V
V
M
1.5 V
Output
V
M
1.5 V
V
X
V
OL
+ 0.3 V
V
Y
V
OH
0.3 V
Supply voltage
V
CC
= 5.0 V
0.5 V
CBT3306_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 4 April 2013
5 of 12
Microchip MCU
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