OKI Semiconductor
MD51V65165E
DESCRIPTION
FEDD51V65165E-02
Issue Date: Aug. 28, 2002
4,194,304-Word
×
16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO
The MD51V65165E is a 4,194,304-word
×
16-bit dynamic RAM fabricated in Oki’s silicon-gate CMOS
technology. The MD51V65165E achieves high integration, high-speed operation, and low-power
consumption because Oki manufactures the device in a quadruple-layer polysilicon/double-layer metal
CMOS process. The MD51V65165E is available in a 50-pin plastic TSOP.
FEATURES
· 4,194,304-word
×
16-bit configuration
·
Single 3.3V power supply,
±0.3V
tolerance
·
Input : LVTTL compatible, low input capacitance
·
Output : LVTTL compatible, 3-state
·
Refresh :
RAS
only refresh
: 4096 cycles/64ms
CAS
before
RAS
refresh, hidden refresh
: 4096 cycles/64ms
·
Fast page mode with EDO, read modify write capability
·
CAS
before
RAS
refresh, hidden refresh,
RAS-only
refresh capability
· Packages
50-pin 400mil plastic TSOP
(
TSOPII50-P-400-0.80-K
)
(Product : MD51V65165E-xxTA)
xx indicates speed rank.
PRODUCT FAMILY
Access Time (Max.)
Family
t
RAC
50ns
60ns
t
AA
25ns
30ns
t
CAC
13ns
15ns
t
OEA
13ns
15ns
Cycle Time
(Min.)
84ns
104ns
Power Dissipation
Operating
(Max.)
504mW
432mW
Standby
(Max.)
1.8mW
MD51V65165E
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FEDD51V65165E-02
1
Semiconductor
MD51V65165E
PIN CONFIGURATION (TOP VIEW)
V
CC
1
DQ1
2
DQ2
3
DQ3 4
DQ4 5
V
CC
6
DQ5 7
DQ6 8
DQ7 9
DQ8
10
NC
11
V
CC
12
WE
13
RAS
14
NC
15
NC
16
NC
17
NC
18
A0
19
A1
20
A2
21
A3
22
A4
23
A5
24
V
CC
25
V
SS
DQ16
DQ15
DQ14
DQ13
V
SS
DQ12
DQ11
DQ10
DQ9
NC
V
SS
38
LCAS
37
UCAS
36
OE
35
NC
34
NC
33
NC
32
A11R
31
A10R
30
A9
29
A8
28
A7
27
A6
26
V
SS
50
49
48
47
46
45
44
43
42
41
40
39
50-Pin Plastic TSOP
(K Type)
Pin Name
A0–A9, A10R, A11R
RAS
LCAS
UCAS
DQ1–DQ16
OE
WE
V
CC
V
SS
NC
Function
Address Input
Row Address Strobe
Lower Byte Column Address Strobe
Upper Byte Column Address Strobe
Data Input/Data Output
Output Enable
Write Enable
Power Supply (3.3V)
Ground (0V)
No Connection
Note : The same power supply voltage must be provided to every V
CC
pin, and the same GND voltage level must
be provided to every V
SS
pin.
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FEDD51V65165E-02
1
Semiconductor
MD51V65165E
BLOCK DIAGRAM
WE
RAS
LCAS
UCAS
Column
Address
Buffers
Internal
Address
Counter
Timing
Generator
I/O
Controller
I/O
Controller
10
10
Column Decoders
OE
8
Output
Buffers
8
DQ1-DQ8
8
I/O
Selector
Input
Buffers
8
A0-A9
Refresh
Control Clock
Sense Amplifiers
16
16
Input
Buffers
8
10
A10R, A11R
2
Row
Address
Buffers
12
Row
Deco-
ders
Word
Drivers
Memory
Cells
8
8
DQ9-DQ16
Output
Buffers
8
V
CC
On Chip
V
BB
Generator
On Chip
IV
CC
Generator
V
SS
FUNCTION TABLE
Input Pin
RAS
H
L
L
L
L
L
L
L
L
LCAS
*
H
L
H
L
L
H
L
L
UCAS
*
H
H
L
L
H
L
L
L
WE
*
*
H
H
H
L
L
L
H
OE
*
*
L
L
L
H
H
H
H
DQ Pin
Function Mode
DQ1-DQ8
High-Z
High-Z
D
OUT
High-Z
D
OUT
D
IN
Don’t Care
D
IN
High-Z
DQ9-DQ16
High-Z
High-Z
High-Z
D
OUT
D
OUT
Don’t Care
D
IN
D
IN
High-Z
Standby
Refresh
Lower Byte Read
Upper Byte Read
Word Read
Lower Byte Write
Upper Byte Write
Word Write
* : “H” or “L”
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FEDD51V65165E-02
1
Semiconductor
MD51V65165E
ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS
Parameter
Voltage on Any Pin Relative to V
SS
Voltage V
CC
Supply relative to V
SS
Short Circuit Output Current
Power Dissipation
Operating Temperature
Storage Temperature
Symbol
V
IN
, V
OUT
V
CC
I
OS
P
D*
T
opr
T
stg
Value
–0.5 to V
CC
+0.5
–0.5 to 4.6
50
1
0 to 70
–55 to 150
Unit
V
V
mA
W
°C
°C
*: Ta = 25°C
RECOMMENDED OPERATING CONDITIONS
(Ta = 0 to 70°C)
Parameter
Power Supply Voltage
Input High Voltage
Input Low Voltage
Symbol
V
CC
V
SS
V
IH
V
IL
Min.
3.0
0
2.0
−
0.3
*2
Typ.
3.3
0
Max.
3.6
0
V
CC
+ 0.3
0.8
*1
Unit
V
V
V
V
Notes: *1. The input voltage is V
CC
+ 1.0V when the pulse width is less than 20ns (the pulse width is with respect
to the point at which V
CC
is applied).
*2. The input voltage is V
SS
−
1.0V when the pulse width is less than 20ns (the pulse width respect to the
point at which V
SS
is applied).
PIN CAPACITANCE
(Vcc = 3.3V
±
0.3V, Ta = 25°C, f = 1 MHz)
Parameter
Input Capacitance (A0 – A9, A10R, A11R)
Input Capacitance
(RAS,
LCAS, UCAS, WE, OE)
Output Capacitance (DQ1 - DQ16)
Symbol
C
IN1
C
IN2
C
I/O
Min.
—
—
—
Max.
5
7
7
Unit
pF
pF
pF
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FEDD51V65165E-02
1
Semiconductor
MD51V65165E
DC CHARACTERISTICS
(V
CC
= 3.3V
±
0.3V, Ta = 0 to 70°C)
MD51V65165
E-50
Min.
Output High Voltage
Output Low Voltage
Input Leakage
Current
Output Leakage
Current
Average Power
Supply Current
(Operating)
Power Supply
Current
(Standby)
Average Power
Supply Current
(RAS-only Refresh)
Power Supply
Current
(Standby)
Average Power
Supply Current
(CAS before
RAS
Refresh)
Average Power
Supply Current
(Fast Page Mode)
V
OH
V
OL
I
OH
=
−2.0mA
I
OL
= 2mA
0V
≤
V
I
≤
V
CC
+0.3V;
I
LI
All other pins not
under test = 0V
DQ disable
0V
≤
V
O
≤
V
CC
RAS, CAS
cycling,
t
RC
= Min.
RAS, CAS
= V
IH
I
CC2
RAS, CAS
≥
V
CC
−
0.2V
RAS
cycling,
I
CC3
CAS
= V
IH
,
t
RC
= Min.
RAS
= V
IH
,
I
CC5
CAS
= V
IL
,
DQ = enable
5
5
mA
1
140
120
mA
1,2
−
10
10
−
10
10
µA
2.4
0
Max.
V
CC
0.4
MD51V65165
E-60
Min.
2.4
0
Max.
V
CC
0.4
V
V
Parameter
Symbol
Condition
Unit
Note
I
LO
−
10
10
−
10
10
µA
I
CC1
140
120
mA
1,2
2
0.5
2
mA
0.5
1
I
CC6
RAS
= cycling,
CAS
before
RAS
140
120
mA
1,2
RAS
= V
IL
,
I
CC7
CAS
cycling,
t
HPC
= Min.
140
120
mA
1,3
Notes: 1. I
CC
Max. is specified as I
CC
for output open condition.
2. The address can be changed once or less while
RAS
= V
IL
.
3. The address can be changed once or less while
CAS
= V
IH
.
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