82547GI/82547EI Gigabit Ethernet
Controller
Networking Silicon
Datasheet
Product Features
■
■
■
CSA Port
— PCI-X revision 1.0a, up to 133 MHz
— Uses dedicated port for client LAN controller
directly on MCH device
— High-speed interface with twice the peak
bandwidth of 32-bit, 33 MHz PCI bus
— PCI power management registers by MCH
MAC Specific
— Optimized transmit and receive queues
— IEEE 802.3x-compliant flow-control support
with software-controllable thresholds
— Caches up to 64 packet descriptors in a single
burst
— Programmable host memory receive buffers
(256 B to 16 KB) and cache line size (16 B to
256 B)
— Wide, optimized internal data path
architecture
— 40 KB configurable Transmit and Receive
FIFO buffers
— Descriptor ring management hardware for
transmit and receive
— Optimized descriptor fetching and write-
back mechanisms
— Mechanism available for reducing interrupts
generated by transmit and receive operations
— Support for transmission and reception of
packets up to 16 KB
PHY Specific
— Integrated for 10/100/1000 Mb/s full- and
half-duplex operation
— IEEE 802.3ab Auto-Negotiation and PHY
compliance and compatibility
— State-of-the-art DSP architecture implements
digital adaptive equalization, echo and cross-
talk cancellation
— PHY cable correction and diagnostics
— Automatic detection of cable lengths
and MDI vs. MDI-X cable at all speeds
■
■
■
■
Host Off-Loading
— Transmit and receive IP, TCP, and UDP
checksum off-loading capabilities
— Transmit TCP segmentation and advanced
packed filtering
— IEEE 802.1Q VLAN tag insertion and
stripping and packet filtering for up to 4096
VLAN tags
— Jumbo frame support up to 16 KB
— Intelligent Interrupt generation (multiple
packets per interrupt)
Manageability
— On-chip SMBus 2.0 port
— ASF 1.0 and 2.0
— Compliance with PCI Power Management
v1.1/ACPI v2.0
— Wake on LAN* (WoL) support
Additional Device
— Four programmable LED outputs
— On-chip power regulator control circuitry
— BIOS LAN Disable pin
— JTAG (IEEE 1149.1) Test Access Port built
in silicon
Lead-free
a
196-pin Ball Grid Array (BGA).
Devices that are lead-free are marked with a
circled “e1” and have the product code:
LUxxxxxx.
a. This device is lead-free. That is, lead has not been intentionally added, but lead may still exist as an impurity at
<1000 ppm. The Material Declaration Data Sheet, which includes lead impurity levels and the concentration of other
Restriction on Hazardous Substances (RoHS)-banned materials, is available at:
ftp://download.intel.com/design/packtech/material_content_IC_Package.pdf#pagemode=bookmarks
In addition, this device has been tested and conforms to the same parametric specifications as previous versions of
the device.
For more information regarding lead-free products from Intel Corporation, contact your Intel Field Sales represen-
tative
Revision 2.1
November 2004
Revision History
Date
Aug 2003
Nov 2004
Revision
2.0
2.1
Non-classified release.
• Added Architecture Overview chapter.
• Update signal names to match Design Guide and EEPROM Map and
Programming Application Note.
• Updated lead-free information.
• Added information about migrating from a 2-layer 0.36 mm wide-trace
substrate to a 2-layer 0.32 mm wide-trace substrate. Refer to the sec-
tion on Package and Pinout Information.
• Added statement that no changes to existing soldering processes are
needed for the 2-layer 0.32 mm wide-trace substrate change in the sec-
tion describing “Package Information”.
Notes
Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual
property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability
whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to
fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not
intended for use in medical, life saving, or life sustaining applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for
future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
The 82547GI/82547EI may contain design defects or errors known as errata which may cause the product to deviate from published specifications.
Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-
548-4725 or by visiting Intel's website at http://www.intel.com.
Copyright © 2004 Intel Corporation
*Third-party brands and names are the property of their respective owners.
ii
Datasheet
Networking Silicon —82547GI(EI)
Contents
1.0
Introduction......................................................................................................................... 1
1.1
1.2
1.3
2.0
2.1
2.2
2.3
2.4
3.0
3.1
3.2
Document Scope................................................................................................... 1
Reference Documents...........................................................................................2
Product Codes....................................................................................................... 2
Internal Architecture Block Diagram...................................................................... 3
Internal MAC Architecture Block Diagram............................................................. 4
Integrated 10/100/1000 Mbps PHY .......................................................................5
CSA Controller Interface ....................................................................................... 5
Signal Type Definitions.......................................................................................... 7
CSA Port Interface ................................................................................................ 7
3.2.1 CSA Data, Strobe and Control Signals ....................................................7
3.2.2 CSA Termination Signals ......................................................................... 7
3.2.3 System Signals......................................................................................... 8
3.2.4 Power Management Signals .................................................................... 8
3.2.5 SMB Signals............................................................................................. 8
EEPROM and Serial Flash and Interface Signals ................................................. 9
Miscellaneous Signals...........................................................................................9
3.4.1 LED Signals.............................................................................................. 9
Other Signals ........................................................................................................9
3.5.1 Crystal Signals .......................................................................................10
3.5.2 Analog Signals .......................................................................................10
Test Interface Signals..........................................................................................10
Power Supply Connections .................................................................................11
3.7.1 Digital and Analog Supplies ...................................................................11
3.7.2 Grounds, Reserved Pins and No Connects ...........................................11
3.7.3 Voltage Regulation Control Signals........................................................11
Absolute Maximum Ratings.................................................................................13
Recommended Operating Conditions .................................................................14
DC Specifications ................................................................................................14
AC Characteristics...............................................................................................18
Timing Specifications ..........................................................................................19
4.5.1 Link Interface Timing ..............................................................................19
4.5.2 EEPROM Interface.................................................................................19
Package Information ...........................................................................................21
Thermal Specifications ........................................................................................23
Pinout Information ...............................................................................................24
Visual Pin Assignments.......................................................................................33
Architectural Overview ....................................................................................................... 3
Signal Descriptions............................................................................................................. 7
3.3
3.4
3.5
3.6
3.7
4.0
Voltage, Temperature, and Timing Specifications............................................................13
4.1
4.2
4.3
4.4
4.5
5.0
Package and Pinout Information ......................................................................................21
5.1
5.2
5.3
5.4
Datasheet
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82547GI(EI)— Networking Silicon
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iv
Datasheet
Networking Silicon — 82547GI(EI)
1.0
Introduction
The Intel
®
82547GI(EI) Gigabit Ethernet Controller is a single, compact component with
integrated Gigabit Ethernet Media Access Control (MAC) and physical layer (PHY) functions.
This device uses the Communications Streaming Architecture (CSA) port of the Intel
®
865 and
Intel
®
875 Chipset. The Intel® 82547GI(EI) allows for a Gigabit Ethernet implementation in a
very small area that is footprint compatible with current generation 10/100 Mbps Fast Ethernet
designs.
The Intel
®
82547GI(EI) integrates Intel’s fifth generation gigabit MAC design with fully
integrated, physical layer circuitry to provide a standard IEEE 802.3 Ethernet interface for
1000BASE-T, 100BASE_TX, and 10BASE-T applications (802.3, 802.3u, and 802.3ab). The
controller is capable of transmitting and receiving data at rates of 1000 Mbps, 100 Mbps, or 10
Mbps. In addition to managing MAC and PHY layer functions, the controller uses dedicated CSA
port capability with a theoretical bandwidth of 266 MB/s.
The 82547GI(EI) on-board System Management Bus (SMB) port enables network manageability
implementations required by information technology personnel for remote control and alerting via
the LAN. With SMB, management packets can be routed to or from a management processor. The
SMB port enables industry standards, such as Intelligent Platform Management Interface (IPMI)
and Alert Standard Forum (ASF) 2.0, to be implemented using the 82547GI(EI). In addition, on-
chip ASF 2.0 circuitry provides alerting and remote control capabilities with standardized
interfaces.
The 82547GI(EI) Gigabit Ethernet Controller with CSA is designed for high performance and low
memory latency. The CSA port architecture is invisible to both system software and the operating
system, allowing a conventional PCI-like configuration.
Wide internal data paths eliminate performance bottlenecks by efficiently handling large address
and data words. The 82547GI(EI) controller includes advanced interrupt handling features. The
82547GI(EI) uses efficient ring buffer descriptor data structures, with up to 64 packet descriptors
cached on chip. A large 40 KB on-chip packet buffer maintains superior performance. In addition,
by using hardware acceleration, the controller offloads tasks from the host, such as TCP/UDP/IP
checksum calculations and TCP segmentation.
The 82547GI(EI) is packaged in a 15 mm X 15 mm, 196-ball grid array and is footprint compatible
with 82562EZ/82562EX Platform LAN Connect devices.
1.1
Document Scope
The 82547GI(EI) is the original device and is now in being manufactured in a B0 stepping. The
82547GI is pin compatible and is a B1 stepping of the same product, however a different Intel
software driver is required. This document contains datasheet specifications for the 82547GI(EI)
Gigabit Ethernet Controller, including signal descriptions, DC and AC parameters, packaging data,
and pinout information.
Datasheet
1
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