IR3088APbF
DATA SHEET
XPHASE
TM
PHASE IC WITH FAULT AND OVERTEMP DETECT
DESCRIPTION
The IR3088A Phase IC combined with an IR
XPhase
Control IC provides a full featured and flexible way to
implement power solutions for the latest high performance CPUs and ASICs. The “Control” IC provides
overall system control and interfaces with any number of “Phase” ICs which each drive and monitor a single
TM
phase of a multiphase converter. The
XPhase
architecture results in a power supply that is smaller, less
expensive, and easier to design while providing higher efficiency than conventional approaches.
The IR3088A is intended for the following application conditions;
•
Excessive impedance between converter and load
•
Output voltage exceeding the control IC reference/VID voltage is desired
TM
FEATURES
•
•
•
•
•
•
•
•
•
•
•
•
•
2.5A Average Gate Drive Current
Loss-Less Inductor Current Sense
Internal Inductor DCR Temperature Compensation
Programmable Phase Delay
Programmable Feed-Forward Voltage Mode PWM Ramp
Sub 100ns Minimum Pulse Width supports 1MHz per-phase operation
Current Sense Amplifier drives a single wire Average Current Share Bus
Current Share Amplifier reduces PWM Ramp slope to ensure sharing between phases
TM
Body Braking
disables Synchronous MOSFET for improved transient response and prevents negative
output voltage at converter turn-off
Phase Fault Detection
Programmable Phase Over-Temperature Detection
Control FET driver’s 25V input voltage capability simplifies boot-strap supply design
Small thermally enhanced 20L MLPQ package
APPLICATION CIRCUIT
VGATE
12V
PHASE FAULT
VRHOT
CCS+
RCS-
DAC
RBIASIN
20k
20
19
18
17
CCS-
RCS+
RPHASE1
16
BIAS
DBST
CBST
CIN
VCCH
15
14
L
13
12
CO
11
1
5 Wire Analog Bus
From Control IC
RMPIN+
RMPIN-
HOTSET
VRHOT
ISHARE
SCOMP
EAIN
RAMP
2
3
4
IR3088A
PHASE
IC
PWMRMP
LGND
VCC
PHSFLT
BIASIN
DACIN
CSIN+
GATEH
PGND
GATEL
VCCL
CSIN-
VO
ISHARE
RPHASE2
5
CVCCL
RVCC
RPWMRMP
CSCOMP
CPWMRMP
EA
RPHASE3
10
6
7
8
9
CVCC
Page 1 of 33
May 18, 2009
IR3088APbF
ORDERING INFORMATION
Device
IR3088AMTR
* IR3088AM
* Samples only
Order Quantity
3000
100 piece strips
ABSOLUTE MAXIMUM RATINGS
Operating Junction Temperature……………..150 C
o
o
Storage Temperature Range………………….-65 C to 150 C
ESD Rating………………………………………HBM Class 1C JEDEC standard
o
PIN #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
PIN NAME
RMPIN+
RMPIN-
HOTSET
VRHOT
ISHARE
SCOMP
EAIN
PWMRMP
LGND
VCC
VCCL
GATEL
PGND
GATEH
VCCH
CSIN+
CSIN-
PHSFLT
DACIN
BIASIN
V
MAX
20V
20V
20V
20V
20V
20V
20V
20V
n/a
24V
27V
27V
0.3V
27V
27V
20V
20V
20V
20V
20V
V
MIN
-0.3V
-0.3V
-0.3V
-0.3V
-0.3V
-0.3V
-0.3V
-0.3V
n/a
-0.3V
-0.3V
-0.3V DC, -2V for
100ns
-0.3V
-0.3V DC, -2V for
100ns
-0.3V
-0.3V
-0.3V
-0.3V
-0.3V
-0.3V
I
SOURCE
1mA
1mA
1mA
1mA
5mA
1mA
1mA
1mA
50mA
n/a
n/a
3A for 100ns,
200mA DC
3A for 100ns,
200mA DC
3A for 100ns,
200mA DC
n/a
1mA
1mA
1mA
1mA
1mA
I
SINK
1mA
1mA
1mA
30mA
5mA
1mA
1mA
20mA
n/a
50mA
3A for 100ns,
200mA DC
3A for 100ns,
200mA DC
n/a
3A for 100ns,
200mA DC
3A for 100ns,
200mA DC
1mA
1mA
20mA
1mA
1mA
Page 2 of 33
May 18, 2009
IR3088APbF
ELECTRICAL SPECIFICATIONS
Unless otherwise specified, these specifications apply over: 8.4V
≤
V
CC
≤
14V, 6V
≤
V
CCH
≤
25V, 6V
≤
V
CCL
o
o
≤
14V, 0 C
≤
T
J
≤
125 C, C
GATEH
= 3.3nF, C
GATEL
= 6.8nF
PARAMETER
Gate Drivers
GATEH Rise Time
GATEH Fall Time
GATEL Rise Time
GATEL Fall Time
GATEL low to GATEH high
delay
GATEH low to GATEL high
delay
Disable Pull-Down Current
Current Sense Amplifier
CSIN+ Bias Current
CSIN- Bias Current
Input Offset Voltage
Gain at T
J
= 25 C
o
Gain at T
J
= 125 C
Slew Rate
o
TEST CONDITION
VCCH = 12V, Measure 2V to 9V
transition time
VCCH = 12V, Measure 9V to 2V
transition time
VCCL = 12V, Measure 2V to 9V
transition time
VCCL = 12V, Measure 9V to 2V
transition time
VCCH = VCCL = 12V, Measure the time
from GATEL falling to 1V to GATEH
rising to 1V
VCCH = VCCL = 12V, Measure the time
from GATEH falling to 1V to GATEL
rising to 1V
Force GATEH or GATEL = 2V with
BIASIN = 0V
MIN
TYP
22
22
50
50
MAX
50
50
75
75
50
UNIT
ns
ns
ns
ns
ns
10
25
10
25
50
ns
15
25
40
µA
CSIN+ = CSIN- = DACIN. Measure
input referred offset from DACIN
-0.5
-0.5
-3
32
27
-0.25
-0.25
0.5
34
29
12.5
0
0
5
36
31
µA
µA
mV
V/V
V/V
V/µs
Current Sense Amplifier output is an
internal node. Slew rate at the ISHARE
pin will be set by the internal 10k
resistor and any stray external
capacitance
-20
0
7.9
9.3
Force I(PWMRMP) = 500µA. Measure
V(PWMRMP) – V(DACIN)
-10
4
Differential Input Range
Common Mode Input Range
o
Rout at T
J
= 25 C
o
Rout at T
J
= 125 C
Ramp Discharge Clamp
Clamp Voltage
Clamp Discharge Current
10.5
12.4
5
8
100
4
13.1
15.5
20
mV
V
k
k
mV
mA
Page 3 of 33
May 18, 2009
IR3088APbF
PARAMETER
Ramp Comparator
Input Offset Voltage
Hysteresis
RMPIN+, RMPIN- Bias
Current
Propagation Delay
TEST CONDITION
MIN
20
-10
-1
100
TYP
40
0
-0.5
150
MAX
80
10
1
240
UNIT
mV
mV
µA
ns
Note 1
VCCH = 12V. Measure time from
RMPIN input (50mV overdrive) to
GATEL transition to <11V.
PWM Comparator
PWM Comparator Input Offset
Voltage
EAIN & PWMRMP Bias
Current
Propagation Delay
-5
Clamp and Current Share Adjust OFF
VCCH = 12V. Measure time from
PWMRMP input (50mV overdrive) to
GATEH transition to < 11V.
Exceeding the Common Mode input
range results in 100% duty cycle
10
-3.5
4
0.9
20
60
-1
5
-0.4
70
15
1
150
mV
µA
ns
Common Mode Input Range
Share Adjust Error Amplifier
Input Offset Voltage
Input Voltage Range
PWMRMP Adjust Current
Transconductance
SCOMP Source/Sink Current
SCOMP Activation Voltage
5
V
20
8
1.6
30
150
EAIN – PWMRMP, Note 1
I(PWMRMP) = 3.5mA, Note 1
Note 1
Amount SCOMP must increase from its
minimum voltage until the Ramp Slope
Adjust current equals = 10µA
I(PWMRMP) = 500µA
Compare to V(DACIN)
VCCL = 12V. Measure time from EAIN
< 0.9 x V(DACIN) (200mV overdrive) to
GATEL transition to < 11V. Note 1.
Compare to V(DACIN)
I(PHSFLT) = 4mA
V(PHSFLT) = 5.5V
30
3.5
2.3
40
300
mV
V
mA
A/V
µA
mV
PWMRMP Min Voltage
0% Duty Cycle Comparator
Threshold Voltage
Propagation Delay
150
88
225
91
100
350
94
150
mV
%
ns
Phase Fault Comparator
Threshold Voltage
Output Voltage
PHSFLT Leakage Current
VRHOT Comparator
HOTSET Bias Current
Output Voltage
VRHOT Leakage Current
Threshold Hysteresis
Threshold Voltage
88
91
300
0
-0.5
150
0
7.0
94
400
10
1
400
10
9.0
%
mV
µA
µA
mV
µA
o
C
V
-2
I(VRHOT) = 29mA
V(VRHOT) = 5.5V
o
T
J
≥
85 C
T
J
≥
85 C
o
3.0
TYP
o
4.73mV/ C x
T
J
+ 1.241V
MIN
o
4.73mV/ C x T
J
+ 1.176V
MAX
o
4.73mV/ C x
T
J
+ 1.356V
Page 4 of 33
May 18, 2009
IR3088APbF
PARAMETER
General
VCC Supply Current
VCCL Supply Current
VCCH Supply Current
BIASIN Bias Current
DACIN Bias Current
Note 1:
Guaranteed by design, but not tested in production
TEST CONDITION
MIN
TYP
10
2.5
5.5
6.5
-2.5
-0.5
MAX
14
5
8
10
2
1
UNIT
mA
mA
mA
mA
µA
µA
6V
≤
V
CCH
≤
14V
14V
≤
V
CCH
≤
25V
-5
-2
PIN DESCRIPTION
PIN#
1
2
3
PIN SYMBOL
RMPIN+
RMPIN-
HOTSET
PIN DESCRIPTION
Non-inverting input to Ramp Comparator
Inverting input to Ramp Comparator
Inverting input to VRHOT comparator. Connect resistor divider from VBIAS to LGND
to program VRHOT threshold. Diode or thermistor may be substituted for lower
resistor for enhanced/remote temperature sensing.
Open Collector output of the VRHOT comparator which drives low if IC junction
temperature exceeds the user programmable limit. Connect external pull-up.
Output of the Current Sense Amplifier and input to the Share Adjust Error Amplifier.
Voltage on this pin is equal to V(DACIN) + 34 * [V(CSIN+) – V(CSIN-)]. Connecting
ISHARE pins together creates a Share Bus enabling current sharing between Phase
ICs. The Share bus is also used by the Control IC for voltage positioning and Over-
Current protection.
Compensation for the Current Share control loop. Connect a capacitor to ground to
set the control loop’s bandwidth.
PWM comparator input from the error amplifier output of Control IC. Both Gate
Driver outputs drive low if the voltage on this pin is less than 91% of V(DACIN).
PWM comparator ramp input. Connect a resistor from this pin to the converter input
voltage and a capacitor to LGND to program the PWM ramp.
Signal ground and IC substrate connection
Power for internal circuitry
Power for Low-Side Gate Driver
Low-Side Gate Driver Output and input to GATEH non-overlap comparator
Return for Gate Drivers
High-Side Gate Driver Output and input to GATEL non-overlap comparator
Power for High-Side Gate Driver
Non-inverting input to the Current Sense Amplifier
Inverting input to the Current Sense
Open Collector output of the Phase Fault comparator. Drives low if Phase current is
unable to match the level of the SHARE bus due to an external fault. Connect
external pull-up.
Reference voltage input from the Control IC. Current sensing and PWM operation
referenced to this pin.
System reference voltage for internal circuitry
May 18, 2009
4
5
VRHOT
ISHARE
6
7
8
9
10
11
12
13
14
15
16
17
18
SCOMP
EAIN
PWMRMP
LGND
VCC
VCCL
GATEL
PGND
GATEH
VCCH
CSIN+
CSIN-
PHSFLT
19
20
Page 5 of 33
DACIN
BIASIN
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