M68HC12B Family
Data Sheet
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© Freescale Semiconductor, Inc., 2005. All rights reserved.
M68HC12B Family Data Sheet, Rev. 9.1
Freescale Semiconductor
3
Revision History
The following revision history table summarizes changes contained in this document. For your
convenience, the page number designators have been linked to the appropriate location.
Revision History
Date
Revision
Level
Description
Figure 1-7. BDM Tool Connector — Added NC (no connect) designator to
pin 3
Figure 18-16. BDM Tool Connector — Added NC designator to pin 3
Table 14-2. Loop Mode Functions — Corrected table header, third column,
from DDRS1 to DDS1
2.0
WOMS bit description, fifth line, changed (via DDRS0/2)
to (via DDS0/2)
SSOE bit description, second line, changed DDRS7 to DDS7
In the table notes following the SPC0 bit description, corrected bit
designators from DDRS4, DDRS5, DDRS6, and DDRS7 to DDS4, DDS5,
DDS6, and DDS7.
September,
2001
Table 13-3. Prescaler Selection — Added value column and updated
prescale factors
19.11 EEPROM Characteristics — Corrected minimum and maximum
values for programming and erase times
Document type changed from Advance Information to Technical Data
reflecting qualification.
Figure 3-9. Condition Code Register (CCR) — Reset value for S bit
corrected from U to 1
14.2.3.3 SCI Control Register 2 — Removed erroneous reference to Port S
bit 3 in the definition for the transmitter enable bit (TE).
January,
2003
5.0
Figure 14-20. Port S Data Register (PORTS) — Removed erroneous pin
function for PS3 and PS2.
Reformatted to meet publication standards
19.2 Maximum Ratings — Corrected maximum values for VDD, VDDA,
VDDX, and VIn
April,
2003
6.0
19.7 ATD Maximum Ratings — Corrected maximum values for VRH and
VRL
Figure 19-1. Programming Voltage Envelope — Corrected maximum values
for VFP and VDD
May,
2003
July,
2003
June,
2004
July,
2005
7.0
19.12.1 Programming Voltage Supply Envelope — Added subsection for
clarity.
19.12.2 Example V
FP
Protection Circuitry — Added subsection for clarity.
8.0
9.0
9.1
19.2 Maximum Ratings — Updated values
19.7 ATD Maximum Ratings — Updated values
Table 13-3. Prescaler Selection — Corrected prescaler factor for
values 6 and 7
Updated to meet Freescale identity guidelines.
Page
Number(s)
29
305
195
195
205
205
June,
2001
172
313
N/A
62
197
208
N/A
307
310
315
315
316
307
310
183
Throughout
3.0
April,
2002
4.0
M68HC12B Family Data Sheet, Rev. 9.1
4
Freescale Semiconductor
List of Chapters
Chapter 1 General Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Chapter 2 Register Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
Chapter 3 Central Processor Unit (CPU). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Chapter 4 Resets and Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Chapter 5 Operating Modes and Resource Mapping. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Chapter 6 Bus Control and Input/Output (I/O) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Chapter 7 EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Chapter 8 FLASH EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Chapter 9 Read-Only Memory (ROM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Chapter 10 Clock Generation Module (CGM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Chapter 11 Pulse-Width Modulator (PWM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
Chapter 12 Standard Timer (TIM). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
Chapter 13 Enhanced Capture Timer (ECT) Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
Chapter 14 Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 191
Chapter 15 Byte Data Link Communications (BDLC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213
Chapter 16 msCAN12 Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 243
Chapter 17 Analog-to-Digital Converter (ATD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .277
Chapter 18 Development Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 289
Chapter 19 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 307
Chapter 20 Mechanical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 331
M68HC12B Family Data Sheet, Rev. 9.1
Freescale Semiconductor
5
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