Si500S
S
INGLE
- E
NDED
O
UTPUT
S
ILICON
O
S C I L L A T O R
Features
Quartz-free, MEMS-free, and PLL-free all-silicon oscillator
Any output frequencies from 0.9 to 200 MHz
Short lead times
Excellent temperature stability (±20 ppm)
Highly reliable startup and operation
High immunity to shock and vibration
Low jitter: <1.5 ps rms
0 to 85 °C operation includes 10-year aging in hot
environments
Footprint compatible with industry-
standard 3.2 x 5.0 mm XOs
CMOS and SSTL versions available
Driver stopped, tri-state, or powerdown
operation
RoHS compliant
1.8, 2.5, or 3.3 V options
Low power
More than 10x better fit rate than
competing crystal solutions
Specifications
Parameters
Frequency Range
Temperature stability,
0 to +70 °C
Temperature stability,
0 to +85 °C
Total stability,
0 to +70 °C operation
1
Total stability,
0 to +85 °C operation
2
Operating Temperature
Storage Temperature
1.8 V option
Supply Voltage
2.5 V option
3.3 V option
Commercial
Extended commercial
Condition
Min
0.9
—
—
—
—
0
0
–55
1.71
2.25
2.97
Typ
—
±10
±20
—
—
—
—
—
—
—
—
Max
200
—
—
±150
±250
70
85
+125
1.98
2.75
3.63
Units
MHz
ppm
ppm
ppm
ppm
°C
°C
°C
V
V
V
Frequency Stability
Notes:
1.
Inclusive of 25 °C initial frequency accuracy, operating temperature range, supply voltage change, output load change,
first-year aging at 25 °C, shock, vibration, and one solder reflow.
2.
Inclusive of 25 °C initial frequency accuracy, operating temperature range, supply voltage change, output load change,
ten-year aging at 85 °C, shock, vibration, and one solder reflow.
3.
See “AN409: Output Termination Options for the Si500S and Si500D Silicon Oscillators” for further details regarding
output clock termination recommendations.
4.
V
TT
= .5 x V
DD
.
5.
V
TT
= .45 x V
DD
.
Rev. 1.1 10/11
Copyright © 2011 by Silicon Laboratories
Si500S
Si500S
Parameters
Condition
1.8 V option, 40 pF, 40 MHz, CMOS
1.8 V option, 10 pF, 200 MHz, CMOS
2.5 V option, 40 pF, 40 MHz, CMOS
2.5 V option, 10 pF, 200 MHz, CMOS
3.3 V option, 40 pF, 40 MHz, CMOS
Supply Current
3.3 V option, 10 pF, 200 MHz, CMOS
SSTL-3.3, 200 MHz
SSTL-2.5, 200 MHz
SSTL-1.8, 200 MHz
Output Stopped, CMOS
Tri-State
Powerdown
Output Symmetry
Times
3
0.5 x V
DD
CMOS, C
L
= 15 pF measured from
20 to 80% of V
DD
SSTL
CMOS Output Voltage
SSTL-1.8 Output Voltage
4
SSTL-2.5 Output Voltage
4
SSTL-3.3 Output Voltage
5
Powerup Time
OE Deassertion to Clk Stop
Return from Output Driver
Stopped Mode
Return from Tri-State Time
Return from Powerdown Time
Period Jitter (1-sigma)
Integrated Phase Jitter
SSTL
3
1 MHz – 0.4 x F
OUT
, SSTL or CMOS
and C
L
< 7 pF,
F
OUT
> 2.5 MHz
V
OH
, sourcing 9 mA
V
OL
, sinking 9 mA
V
OH
V
OL
V
OH
V
OL
V
OH
V
OL
From time V
DD
crosses min spec
supply
Min
—
—
—
—
—
—
—
—
—
—
—
—
46 – 13 ns/T
CLK
—
—
V
DD
– 0.5
—
V
TT
+ 0.375
—
V
TT
+ 0.48
—
V
TT
+ 0.48
—
—
—
—
—
—
—
—
Typ
13.9
16.7
15.8
19.3
17.7
21.5
18.1
18.0
16.8
11.8
9.7
1.0
—
1.4
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1
0.7
Max
16
19
18
22
20
24
20.2
19.7
18.7
13.1
10.7
1.9
54 +
13 ns/T
CLK
2.0
0.6
—
0.5
—
V
TT
– 0.375
—
V
TT
– 0.48
—
V
TT
– 0.48
2
250 +
3 x T
CLK
250 +
3 x T
CLK
12 + 3 x T
CLK
2
2
1.5
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
%
ns
ns
V
V
V
V
V
ms
ns
ns
µs
ms
ps
RMS
ps
RMS
Rise and Fall
Notes:
1.
Inclusive of 25 °C initial frequency accuracy, operating temperature range, supply voltage change, output load change,
first-year aging at 25 °C, shock, vibration, and one solder reflow.
2.
Inclusive of 25 °C initial frequency accuracy, operating temperature range, supply voltage change, output load change,
ten-year aging at 85 °C, shock, vibration, and one solder reflow.
3.
See “AN409: Output Termination Options for the Si500S and Si500D Silicon Oscillators” for further details regarding
output clock termination recommendations.
4.
V
TT
= .5 x V
DD
.
5.
V
TT
= .45 x V
DD
.
2
Rev. 1.1
Si500S
Package Specifications
Table 1. Package Diagram Dimensions (mm)
Dimension
A
A1
b
D
e
E
L
0.95
Min
0.80
0.00
1.15
Nom
0.85
0.03
1.20
3.20 BSC
2.54 BSC
4.00 BSC
1.00
1.05
Max
0.90
0.05
1.25
Dimension
L1
aaa
bbb
ccc
ddd
eee
Min
0.00
Nom
0.05
Max
0.10
0.10
0.10
0.08
0.10
0.05
Table 2. Pad Connections
1
2
3
4
OE
GND
Output
VDD
Table 3. Tri-State/Powerdown/Driver Stopped
Function on OE (3rd Option Code)
A
B
C
Active
Active
D
Active
Power-
down
E
Active
Active
F
Active
Driver
Stopped
Active
Open
Active Active
1
Active
Level
0
Level
Tri-
State
Tri-
State
Active
Power-
Driver
Active
down
Stopped
Dimension
C1
E
X1
Y1
(mm)
2.90
2.40
1.40
1.70
0 C CC CC
T TTT TT
Y Y WW
0 = Si500
CCCCC = mark code
TTTTTT = assembly manufacturing code
YY = year
WW = work week
Figure 1. Recommended Land Pattern
Figure 2. Top Mark
Rev. 1.1
3
Si500S
Environmental Compliance
Parameter
Mechanical Shock
Mechanical Vibration
Resistance to Soldering Heat
Solderability
Damp Heat
Moisture Sensitivity Level
Conditions/Test Method
MIL-STD-883, Method 2002.4
MIL-STD-883, Method 2007.3 A
MIL-STD-202, 260 C
°
for 8 seconds
MIL-STD-883, Method 2003.8
IEC 68-2-3
J-STD-020, MSL 3
Ordering Information
The Si500S supports a variety of options including frequency, output format, supply voltage, and tri-
state/powerdown/output driver stopped mode. Specific device configurations are programmed into the Si500S at
time of shipment. Configurations are specified using the figure below. Silicon Labs provides a web-based part
number
utility
that
can
be
used
to
simplify
part
number
configuration.
Refer
to
www.silabs.com/SiliconXOPartnumber
to access this tool. The Si500S silicon oscillator is supplied in a ROHS-
compliant, 4-pad, 3.2 x 4.0 mm package. Tape and reel packaging is available as an ordering option.
500S
X
X
X
XXMXXXX
Frequency
A
C
X
R
Si500 Oscillator
1
st
Option Code
V
DD
A
D
E
H
J
M
3.3
3.3
2.5
2.5
1.8
1.8
Format
CMOS
SSTL
CMOS
SSTL
CMOS
SSTL
xMxxxxx: f
OUT
< 10 MHz
xxMxxxx: 10 MHz < f
OUT
< 100 MHz
xxxMxxx: f
OUT
> 100 MHz
R = Tape & Reel
Blank = Cut-Tape
3
rd
Option Code
Tri-State/Powerdown/
Output Driver Stopped
OE active high/tristate
A
OE active low/tristate
B
OE active high/powerdown
C
OE active low/powerdown
D
OE active high/driver stopped
E
OE active low/driver stopped
F
2
nd
Option Code
A
B
Stability (ppm, max)
±150
±250
Oper. Temp Range
F
0 to 70 °C
*H
0 to 85 °C
Product Revision = C
Package
A
3.2 x 4.0 mm SMD
*Note: Only +250 ppm is supported.
4
Rev. 1.1
Si500S
D
OCUMENT
C
HANGE
L
IST
Revision 0.3 to Revision 0.4
Revision B to Revision C updated in Ordering Information
0 to 85 C° Operating Temperature Range option added
Multiple CMOS output format codes removed
Revision 0.4 to Revision 1.0
Clarified SSTL specifications.
Revised CMOS supply current max values .
Revision 1.0 to Revision 1.1
Updated Ordering information for ±250 ppm from 0 to
+85 °C.
Updated jitter from 1.5 ps to 1.5 ps rms.
Updated operating temperature to include extended
commercial at 0 to +85 °C.
Rev. 1.1
5
FPGA/CPLD
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